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36
Software Synthesis for DSP Using Ptolemy
 Journal of VLSI Signal Processing
, 1993
"... Ptolemy is an environment for simulation, prototyping, and software synthesis for heterogeneous systems. It uses modern objectoriented software technology (in C++) to model each subsystem in a natural and efficient manner, and to integrate these subsystems into a whole. The objectives of Ptolemy en ..."
Abstract

Cited by 68 (26 self)
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Ptolemy is an environment for simulation, prototyping, and software synthesis for heterogeneous systems. It uses modern objectoriented software technology (in C++) to model each subsystem in a natural and efficient manner, and to integrate these subsystems into a whole. The objectives of Ptolemy encompass practically all aspects of designing signal processing and communications systems, ranging from algorithms and communication strategies, through simulation, hardware and software design, parallel computing, and generation of realtime prototypes. In this paper we will introduce the software synthesis aspects of the Ptolemy system. The environment presented here is both modular and extensible. Ptolemy allows the user to choose among various single or multipleprocessor schedulers. 1.0 Introduction Practical signal processing systems today are rarely implemented without software or firmware, even at the ASIC level. Programmable DSPs, in particular, form the heart of many implementati...
APGAN and RPMC: Complementary Heuristics for Translating DSP Block Diagrams into Efficient Software Implementations
 DSP BLOCK DIAGRAMS INTO EFFICIENT SOFTWARE IMPLEMENTATIONS”, DAES
, 1997
"... Dataflow has proven to be an attractive computational model for graphical DSP design environments that support the automatic conversion of hierarchical signal flow diagrams into implementations on programmable processors. The synchronous dataflow (SDF) model is particularly wellsuited to dataflowba ..."
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Cited by 46 (11 self)
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Dataflow has proven to be an attractive computational model for graphical DSP design environments that support the automatic conversion of hierarchical signal flow diagrams into implementations on programmable processors. The synchronous dataflow (SDF) model is particularly wellsuited to dataflowbased graphical programming because its restricted semantics offer strong formal properties and significant compiletime predictability, while capturing the behavior of a large class of important signal processing applications. When synthesizing software for embedded signal processing applications, critical constraints arise due to the limited amounts of memory. In this paper, we propose a solution to the problem of jointly optimizing the code and data size when converting SDF programs into software implementations. We consider two approaches. The first is a customization to acyclic graphs of a bottomup technique, called pairwise grouping of adjacent nodes (PGAN), that was proposed earlier f...
Minimizing Memory Requirements in RateOptimal Schedules
, 1994
"... In this paper we address the problem of minimizing buffer storage requirement in constructing rateoptimal compiletime schedules for multirate dataflow graphs. We demonstrate that this problem, called the Minimum Buffer RateOptimal (MBRO) scheduling problem, can be formulated as a unified linear ..."
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Cited by 31 (2 self)
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In this paper we address the problem of minimizing buffer storage requirement in constructing rateoptimal compiletime schedules for multirate dataflow graphs. We demonstrate that this problem, called the Minimum Buffer RateOptimal (MBRO) scheduling problem, can be formulated as a unified linear programming problem. A novel feature of our method is that it tries to minimize the memory requirement while simultaneously maximizing the computation rate. We have constructed an experimental testbed which implements our scheduling algorithm as well as (i) the widely used periodic admissible parallel schedules proposed by Lee and Messerschmitt [12], (ii) the optimal scheduling buffer allocation (OSBA) algorithm of Ning and Gao [15], and (iii) the multirate software pipelining (MRSP) algorithm [7]. The experimental results have demonstrated a significant improvement in buffer requirements for the MBRO schedules compared to the schedules generated by the other three methods. Compared to bloc...
Joint minimization of code and data for synchronous dataflow programs
 J. Formal Methods Syst. Des
, 1997
"... Abstract. In this paper, we formally develop techniques that minimize the memory requirements of a target program when synthesizing software from dataflow descriptions of multirate signal processing algorithms. The dataflow programming model that we consider is the synchronous dataflow (SDF) model [ ..."
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Cited by 30 (5 self)
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Abstract. In this paper, we formally develop techniques that minimize the memory requirements of a target program when synthesizing software from dataflow descriptions of multirate signal processing algorithms. The dataflow programming model that we consider is the synchronous dataflow (SDF) model [21], which has been used heavily in DSP design environments over the past several years. We first focus on the restricted class of wellordered SDF graphs. We show that while extremely efficient techniques exist for constructing minimum code size schedules for wellordered graphs, the number of distinct minimum code size schedules increases combinatorially with the number of vertices in the input SDF graph, and these different schedules can have vastly different data memory requirements. We develop a dynamic programming algorithm that computes the schedule that minimizes the data memory requirement from among the schedules that minimize code size, and we show that the time complexity of this algorithm is cubic in the number of vertices in the given wellordered SDF graph. We present several extensions to this dynamic programming technique to more general scheduling problems, and we present a heuristic that often computes nearoptimal schedules with quadratic time complexity. We then show that finding optimal solutions for arbitrary acyclic graphs is NPcomplete, and present heuristic techniques that jointly minimize code and data size requirements. We present a practical example and simulation data that demonstrate the effectiveness of these techniques.
Memory Management for Dataflow Programming of Multirate Signal Processing Algorithms
 IEEE TRANSACTIONS ON SIGNAL PROCESSING
, 1994
"... Managing the buffering of data along arcs is a critical part of compiling a synchronous dataflow (SDF) program. This paper shows how dataflow properties can be analyzed at compiletime to make buffering more efficient. Since the target code corresponding to each node of an SDF graph is normally obta ..."
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Cited by 21 (4 self)
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Managing the buffering of data along arcs is a critical part of compiling a synchronous dataflow (SDF) program. This paper shows how dataflow properties can be analyzed at compiletime to make buffering more efficient. Since the target code corresponding to each node of an SDF graph is normally obtained from a handoptimized library of predefined blocks, the efficiency of data transfer between blocks is often the limiting factor in how closely an SDF compiler can approximate meticulous manual coding. Furthermore, in the presence of large samplerate changes, straightforward buffering techniques can quickly exhaust limited onchip data memory, necessitating the use of slower external memory. The techniques presented in this paper address both of these problems in a unified manner.
A Hierarchical Multiprocessor Scheduling Framework For Synchronous Dataflow Graphs
 Laboratory, University of California at Berkeley
, 1995
"... This paper discusses a hierarchical scheduling framework to reduce the complexity of scheduling synchronous dataflow (SDF) graphs onto multiple processors. The core of this framework is a clustering algorithm that reduces the number of nodes before expanding the SDF graph into a precedence DAG (dire ..."
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Cited by 21 (7 self)
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This paper discusses a hierarchical scheduling framework to reduce the complexity of scheduling synchronous dataflow (SDF) graphs onto multiple processors. The core of this framework is a clustering algorithm that reduces the number of nodes before expanding the SDF graph into a precedence DAG (directed acyclic graph). The internals of the clusters are then scheduled with uniprocessor SDF schedulers which can optimize for memory usage. The clustering is done in such a manner as to leave ample parallelism exposed for the multiprocessor scheduler. The advantages of this framework are demonstrated with several practical, realtime examples.
Minimizing Buffer Requirements under RateOptimal Schedule in Regular Dataflow Networks
 Journal of VLSI Signal Processing
, 1994
"... Largegrain synchronous dataflow graphs or multirate graphs have the distinct feature that the nodes of the dataflow graph fire at different rates. Such multirate largegrain dataflow graphs have been widely regarded as a powerful programming model for DSP applications. In this paper we propose a ..."
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Cited by 19 (0 self)
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Largegrain synchronous dataflow graphs or multirate graphs have the distinct feature that the nodes of the dataflow graph fire at different rates. Such multirate largegrain dataflow graphs have been widely regarded as a powerful programming model for DSP applications. In this paper we propose a method to minimize buffer storage requirement in constructing rateoptimal compiletime (MBRO) schedules for multirate dataflow graphs. We demonstrate that the constraints to minimize buffer storage while executing at the optimal computation rate (i.e. the maximum possible computation rate without storage constraints) can be formulated as a unified linear programming problem in our framework. A novel feature of our method is that it tries to minimize the memory requirement while simultaneously maximizing the computation rate. We have constructed an experimental testbed which implements our MBRO scheduling algorithm as well as (i) the widely used periodic admissible parallel schedules (also ...
DomainSpecific Interface Generation from Dataflow Specifications
 IN PROCEEDINGS OF SIXTH INTERNATIONAL WORKSHOP ON HARDWARE/SOFTWARE CODESIGN, CODES 98
, 1998
"... In this paper, the problem of automatically mapping largegrain dataflow programs onto heterogeneous hardware/software architectures is treated. Starting with a given hardware/software partition, interfaces are automatically inserted into the specification to account for communication, in particular ..."
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Cited by 15 (5 self)
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In this paper, the problem of automatically mapping largegrain dataflow programs onto heterogeneous hardware/software architectures is treated. Starting with a given hardware/software partition, interfaces are automatically inserted into the specification to account for communication, in particular across hardware/software boundaries. Depending on the target architecture, the interfaces are refined according to given communication constraints (bus protocols, memory mapping, interrupts, DMA, etc.). An objectoriented approach is presented that enables an easy migration (retargeting) of typical communication primitives to other target architectures.
Realtime Signal Processing  Dataflow, Visual, and Functional Programming
, 1995
"... This thesis presents and justifies a framework for programming realtime signal processing systems. The framework extends the existing "blockdiagram" programming model; it has three components: a very highlevel textual language, a visual language, and the dataflow process network model o ..."
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Cited by 13 (1 self)
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This thesis presents and justifies a framework for programming realtime signal processing systems. The framework extends the existing "blockdiagram" programming model; it has three components: a very highlevel textual language, a visual language, and the dataflow process network model of computation. The dataflow process network model, although widelyused, lacks a formal description, and I provide a semantics for it. The formal work leads into a new form of actor. Having established the semantics of dataflow processes, the functional language Haskell is layered above this model, providing powerful featuresnotably polymorphism, higherorder functions, and algebraic program transformationabsent in blockdiagram systems. A visual equivalent notation for Haskell, Visual Haskell, ensures that this power does not exclude the "intuitive" appeal of visual interfaces; with some intelligent layout and suggestive icons, a Visual Haskell program can be made to look very like a block dia...
The token flow model
 In
, 1993
"... This paper reviews and extends an analytical model for the behavior of dataflow graphs with datadependent control flow. The number of tokens produced or consumed by each actor is given as a symbolic function of the Booleans in the system. Longterm averages can be analyzed to determine consistency ..."
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Cited by 13 (0 self)
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This paper reviews and extends an analytical model for the behavior of dataflow graphs with datadependent control flow. The number of tokens produced or consumed by each actor is given as a symbolic function of the Booleans in the system. Longterm averages can be analyzed to determine consistency of token flow rates. Shortterm behavior can be analyzed to construct an annotated schedule, or a static schedule that annotates each firing of an actor with the Boolean conditions under which that firing occurs. Necessary and sufficient conditions for boundedlength schedules, as well as sufficient conditions for determining that a dataflow graph can be scheduled in bounded memory are given. Annotated schedules can be used to generate efficient implementations of the algorithms described by the dataflow graphs. 1.