Abstract — Oversampling techniques based on sigma-delta (ΣΔ) modulation offer numerous advantages for the realization of high-resolution analog-to-digital (A/D) converters in a low-voltage environment. This paper examines the design and implementation of a CMOS ΣΔ modulator for digital-audio A/D conversion that operates from a single 1.8-V power supply. A cascaded modulator that maintains a large full-scale input range while avoiding signal clipping at internal nodes is introduced. The experimental modulator has been designed with fully-differential switched-capacitor integrators employing different input and output common-mode levels and boosted clock drivers in order to facilitate low voltage operation. Precise control of common-mode levels, high power supply noise rejection, and low power dissipation are obtained through the use of two-stage, class A/AB operational amplifiers. At a sampling rate of 4 MHz and an oversampling ratio of 80, an implementation of the modulator in a 0.8-μm CMOS technology with metal-to-polycide capacitors and NMOS and PMOS threshold voltages of +0.65-V and –0.75-V, respectively, achieves a dynamic range of 99 dB at a Nyquist conversion rate of 50 kHz. The modulator can operate from supply voltages ranging from 1.5 V to 2.5 V, occupies an active area of 1.5 mm 2, and dissipates 2.5 mW from a 1.8-V supply.

The high-order \Sigma-\Delta modulator is an appropriate approach for high-bandwidth, high-resolution A/D conversion. However, non-ideal effects such as the finite opamp gain and the capacitor mismatch have great impacts on its performance at a low oversampling ratio. To achieve greater performance under the inevitable non-ideal effects, we explore several multiple-bit schemes, based on our CIQE high-order \Sigma-\Delta architecture, to remove the non-ideal deterioration. Design rules of these multiple-bit schemes are developed and verified by extensive simulations. I. Introduction The A/D converter is an important element for digitalsignal processing systems. The cruxes of an A/D converter are high resolution for precise representation of the original signal and high bandwidth for fast processing. Conventional A/D architectures, e.g., flash, 2-step flash, and successive approximation, are not suitable for highresolution applications because of the need of near-ideal analog component...

tres reconnaissant au Professeur Alain Greiner pour la confiance qu'il m'a accorde et pour m'avoir permit d'effectuer plusieurs sejours scientifiques dans differents laboratoires de recherche industriels et universitaires. I would like to thank the reviewers of my Ph.D. thesis: Professor Franco Maloberti from Texas A&M University and Professor Georges Gielen from Katholieke Leuven Universiteit for their detailed report on the manuscript. I am also grateful to other members of the comittee in charge of my Ph.D. defense: Professor Andreas Kaiser from l'Institut Superieur d'Electronique du Nord, Professor Ahmed Soliman from Cairo University, Mr. Carel Dijkmans from Philips Research Laboratories and Mr. Frederic Paillardet from STMicroelectronics R&D. Their presence was a great honor for me and the best reward for the several years of work on this thesis. Je tiens tres particulierement a remercier Mr. Jacky Porte, enseignant-chercheur a l'ENST-Paris, pour avoir si genereusement partage a

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