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Computeraided design of analog and mixedsignal integrated circuits
 Proceedings of the IEEE
, 2000
"... This survey presents an overview of recent advances in the state of the art for computeraided design (CAD) tools for analog and mixedsignal integrated circuits (ICs). Analog blocks typically constitute only a small fraction of the components on mixedsignal ICs and emerging systemsonachip (SoC ..."
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Cited by 72 (12 self)
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This survey presents an overview of recent advances in the state of the art for computeraided design (CAD) tools for analog and mixedsignal integrated circuits (ICs). Analog blocks typically constitute only a small fraction of the components on mixedsignal ICs and emerging systemsonachip (SoC) designs. But due to the increasing levels of integration available in silicon technology and the growing requirement for digital systems to communicate with the continuousvalued external world, there is a growing need for CAD tools that increase the design productivity and improve the quality of analog integrated circuits. This paper describes the motivation and evolution of these tools and outlines progress on the various design problems involved: simulation and modeling, symbolic analysis, synthesis and optimization, layout generation, yield analysis and design centering, and test. This paper summarizes the problems for which viable solutions are emerging and those which are still unsolved. Keywords—Analog and mixedsignal computeraided design (CAD), analog and mixedsignal integrated circuits, analog circuit and layout synthesis, analog design automation, circuit simulation and modeling. I.
MAELSTROM: Efficient simulationbased synthesis for custom analog cells
 Proc. of the 1999 ACM/IEEE Design Automation Conference
, 1999
"... Analog synthesis tools have failed to migrate into mainstream use primarily because of difficulties in reconciling the simplified models required for synthesis with the industrialstrength simulation environments required for validation. MAELSTROM is a new approach that synthesizes a circuit using t ..."
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Cited by 40 (8 self)
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Analog synthesis tools have failed to migrate into mainstream use primarily because of difficulties in reconciling the simplified models required for synthesis with the industrialstrength simulation environments required for validation. MAELSTROM is a new approach that synthesizes a circuit using the same simulation environment created to validate the circuit. We introduce a novel genetic/ annealing optimizer, and leverage network parallelism to achieve efficient simulatorintheloop analog synthesis. ___________________________ Permission to make digital/hardcopy of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage, the copyright notice, the title of the publication and its date appear, and notice is given that copying is by permission of ACM, Inc. To copy otherwise, to republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee.
Anaconda: Simulationbased synthesis of analog circuits via stochastic pattern search
 16 GENETIC PROGRAMMING THEORY AND PRACTICE III
, 2000
"... Abstract—Analog synthesis tools have traditionally traded quality for speed, substituting simplified circuit evaluation methods for full simulation in order to accelerate the numerical search for solution candidates. As a result, these tools have failed to migrate into mainstream use primarily becau ..."
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Cited by 33 (3 self)
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Abstract—Analog synthesis tools have traditionally traded quality for speed, substituting simplified circuit evaluation methods for full simulation in order to accelerate the numerical search for solution candidates. As a result, these tools have failed to migrate into mainstream use primarily because of difficulties in reconciling the simplified models required for synthesis with the industrialstrength simulation environments required for validation. We argue that for synthesis to be practical, it is essential to synthesize a circuit using the same simulation environment created to validate the circuit. In this paper, we develop a new numerical search algorithm efficient enough to allow full circuit simulation of each circuit candidate, and robust enough to find good solutions for difficult circuits. The method combines the populationofsolutions ideas from evolutionary algorithms with a novel variant of pattern search, and supports transparent network parallelism. Comparison of several synthesized celllevel circuits against manual industrial designs demonstrates the utility of the approach. Index Terms—Algorithms, analog synthesis, mixedsignal design, pattern search. I.
Canonical Symbolic Analysis of Large Analog Circuits with Determinant Decision Diagrams
 IEEE TRANS. ON COMPUTERAIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
, 2000
"... Symbolic analogcircuit analysis has many applications, and is especially useful for analog synthesis and testability analysis. Existing approaches rely on two forms of symbolic expression representation: expanded sumofproduct form or arbitrarily nested form. Expanded form suffers the problem that ..."
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Cited by 23 (8 self)
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Symbolic analogcircuit analysis has many applications, and is especially useful for analog synthesis and testability analysis. Existing approaches rely on two forms of symbolic expression representation: expanded sumofproduct form or arbitrarily nested form. Expanded form suffers the problem that the number of product terms grows exponentially with the size of a circuit, and approximation has to be used. Nested form is not canonical, i.e., many representations exist for a symbolic expression, and manipulations with the nested form are often complicated. In this paper, we present a new approach to exact and canonical symbolic analysis by exploiting the sparsity and sharing of product terms. It consists of representing the symbolic determinant of a circuit matrix by a graphcalled determinant decision diagram (DDD)and performing symbolic analysis by graph manipulations. We showed that DDD construction, as well as many symbolic analysis algorithms, can be performed in time complex...
Symbolic Analysis of Large Analog Circuits with Determinant Decision Diagrams
, 1997
"... Symbolic analogcircuit analysis has many applications, and is especially useful for analog synthesis and testability analysis. In this paper, we present a new approach to exact and canonical symbolic analysis by exploiting the sparsity and sharing of product terms. It consists of representing the s ..."
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Cited by 16 (10 self)
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Symbolic analogcircuit analysis has many applications, and is especially useful for analog synthesis and testability analysis. In this paper, we present a new approach to exact and canonical symbolic analysis by exploiting the sparsity and sharing of product terms. It consists of representing the symbolic determinant of a circuit matrix by a graphcalled determinant decision diagram (DDD)and performing symbolic analysis by graph manipulations. We showed that DDD construction and DDDbased symbolic analysis can be performed in time complexity proportional to the number of DDD vertices. We described a vertex ordering heuristic, and showed that the number of DDD vertices can be quite smallusually ordersofmagnitude less than the number of product terms. The algorithm has been implemented. An orderofmagnitude improvement in both CPU time and memory usages over existing symbolic analyzers ISAAC and MapleV has been observed for large analog circuits. 1. Introduction Symbolic a...
Hierarchical Symbolic Analysis Of Large Analog Circuits With Determinant Decision Diagrams
 IEEE Trans. on ComputerAided Design of Integrated Circuits and Systems
, 1998
"... A novel hierarchical approach is proposed to symbolic analysis of large analog circuits. The key idea is to use a graphbased representation  called Determinant Decision Diagram (DDD)  to represent the symbolic determinant and cofactors associated with the MNA matrix for each subcircuit block. B ..."
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Cited by 15 (5 self)
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A novel hierarchical approach is proposed to symbolic analysis of large analog circuits. The key idea is to use a graphbased representation  called Determinant Decision Diagram (DDD)  to represent the symbolic determinant and cofactors associated with the MNA matrix for each subcircuit block. By exploiting the inherent sharing and sparsity of symbolic expressions, DDD is capable of representing a huge number of symbolic product terms in a canonical and highlycompact manner. Further, it enables cofactoring and sensitivity computation to be performed with time linear in the size of DDD. Experimental results have demonstrated that our method outperforms the bestknown existing hierarchical symbolic analyzer SCAPP, and sometimes even numerical simulator SPICE.
A Case Study of Synthesis for IndustrialScale Analog IP: Redesign of the Equalizer/Filter Frontend for an ADSL CODEC
 In Proc. Design Automation Conf
, 2000
"... A persistent criticism of analog synthesis techniques is that they cannot cope with the complexity of realistic industrial designs, especially systemlevel designs. We show how recent advances in simulationbased synthesis can be augmented, via appropriate macromodeling, to attack complex analog blo ..."
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Cited by 13 (4 self)
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A persistent criticism of analog synthesis techniques is that they cannot cope with the complexity of realistic industrial designs, especially systemlevel designs. We show how recent advances in simulationbased synthesis can be augmented, via appropriate macromodeling, to attack complex analog blocks. To support this claim, we resynthesize from scratch, in several different styles, a complex equalizer/filter block from the frontend of a commercial ADSL CODEC, and verify by full simulation that it matches its original design specifications. As a result, we argue that synthesis has significant potential in both custom and analog IP reuse scenarios.
ASF: A practical simulationbased methodology for the synthesis of custom analog circuits
 IEEE/ACM Int. Conf. on Computer Aided Design
, 2001
"... Abstract: This paper describes ASF, a novel celllevel analog synthesis framework that can size and bias a given circuit topology subject to a set of performance objectives and a manufacturing process. To manage complexity and timetomarket, SoC designs require a high level of automation and reuse. ..."
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Cited by 12 (1 self)
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Abstract: This paper describes ASF, a novel celllevel analog synthesis framework that can size and bias a given circuit topology subject to a set of performance objectives and a manufacturing process. To manage complexity and timetomarket, SoC designs require a high level of automation and reuse. Digital methodologies are inapplicable to analog IP, which relies on tight control of lowlevel device and circuit properties that vary widely across manufacturing processes. This analog synthesis solution automates these tedious, technology specific aspects of analog design. Unlike previously proposed approaches, ASF extends the prevalent “schematic and SPICE ” methodology used to design analog and mixedsignal circuits. ASF is topology and technology independent and can be easily integrated into a commercial schematic capture design environment. Furthermore, ASF employs a novel numerical optimization formulation that incorporates classical downhill techniques into stochastic search. ASF consistently produces results comparable to expert manual design with 10x fewer candidate solution evaluations than previously published approaches that rely on traditional stochastic optimization methods. I.
Compact representation and efficient generation of sexpanded symbolic network functions for computeraided analog circuit design
 IEEE Trans. ComputerAided Design
, 2001
"... Abstract—A graphbased approach is presented for the generation of exact symbolic network functions in the form of rational polynomials of the complex frequency variable for analog integrated circuits. The approach employs determinant decision diagrams (DDDs) to represent the determinant of a cir ..."
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Cited by 8 (2 self)
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Abstract—A graphbased approach is presented for the generation of exact symbolic network functions in the form of rational polynomials of the complex frequency variable for analog integrated circuits. The approach employs determinant decision diagrams (DDDs) to represent the determinant of a circuit matrix and its cofactors. A notion of multiroot DDDs is introduced, where each root represents a symbolic expression for an individual coefficient of the powers of in the numerator and denominator of a network function, and multiple roots share their common subgraphs. A DDDbased algorithm is presented for generatingexpanded network functions. We prove theoretically and validate experimentally that the algorithm constructs in ( DDD) time anexpanded DDD with no more than DDD vertices, where is the degree of the denominator polynomial, is the maximum number of devices that connect to a circuit node, and DDD is
A Behavioral Signal Path Modeling Methodology for Qualitative Insight
 in and Efficient Sizing of CMOS Opamps. Proc. of ICCAD
, 1997
"... This paper describes a new modeling methodology that allows to derive systematically behavioral signal path models of operational amplifiers. Combined with symbolic simulation, these models provide high qualitative insight in the smallsignal functioning of a circuit. The behavioral signal path mod ..."
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Cited by 7 (3 self)
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This paper describes a new modeling methodology that allows to derive systematically behavioral signal path models of operational amplifiers. Combined with symbolic simulation, these models provide high qualitative insight in the smallsignal functioning of a circuit. The behavioral signal path model provides compact interpretable expressions for the poles and zeros that constitute the signal path. These expressions show which design parameters have dominant influence on the position of a pole/zero and thus enable a designer to control a manual interactive sizing process. The methodology consists of the application of a sequence of abstractions, so that one gradually progresses from a full device to a full behavior circuit representation. During this translation, qualitative insight and design requirements are obtained. The methodology is implemented in an open tool called EF2ef. The behavioral signal path model is also used for optimization based sizing in order to achieve pole placement in an efficient way. For optimization based sizing, a new strategy for hierarchical penalty function composition is proposed, which allows sequential pruning of the design space. Combined with an operating point driven DC formulation and local minimax optimization, a fast sizing method is obtained which can be used for interactive design space exploration. Experimental results of both modeling and sizing are shown. I.