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14
A performance study of BDDbased model checking
 IN PROCEEDINGS OF THE FORMAL METHODS ON COMPUTERAIDED DESIGN
, 1998
"... We present a study of the computational aspects of model checking based on binary decision diagrams (BDDs). By using a tracebased evaluation framework, we are able to generate realistic benchmarks and perform this evaluation collaboratively across several different BDD packages. This collaboration ..."
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Cited by 40 (4 self)
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We present a study of the computational aspects of model checking based on binary decision diagrams (BDDs). By using a tracebased evaluation framework, we are able to generate realistic benchmarks and perform this evaluation collaboratively across several different BDD packages. This collaboration has resulted in significant performance improvements and in the discovery of several interesting characteristics of model checking computations. One of the main conclusions of this work is that the BDD computations in model checking and in building BDDs for the outputs of combinational circuits have fundamentally different performance characteristics. The systematic evaluation has also uncovered several open issues that suggest new research directions. We hope that the evaluation methodology used in this study will help lay the foundation for future evaluation of BDDbased algorithms.
Efficient ExternalMemory Data Structures and Applications
, 1996
"... In this thesis we study the Input/Output (I/O) complexity of largescale problems arising e.g. in the areas of database systems, geographic information systems, VLSI design systems and computer graphics, and design I/Oefficient algorithms for them. A general theme in our work is to design I/Oeffic ..."
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Cited by 38 (12 self)
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In this thesis we study the Input/Output (I/O) complexity of largescale problems arising e.g. in the areas of database systems, geographic information systems, VLSI design systems and computer graphics, and design I/Oefficient algorithms for them. A general theme in our work is to design I/Oefficient algorithms through the design of I/Oefficient data structures. One of our philosophies is to try to isolate all the I/O specific parts of an algorithm in the data structures, that is, to try to design I/O algorithms from internal memory algorithms by exchanging the data structures used in internal memory with their external memory counterparts. The results in the thesis include a technique for transforming an internal memory tree data structure into an external data structure which can be used in a batched dynamic setting, that is, a setting where we for example do not require that the result of a search operation is returned immediately. Using this technique we develop batched dynamic external versions of the (onedimensional) rangetree and the segmenttree and we develop an external priority queue. Following our general philosophy we show how these structures can be used in standard internal memory sorting algorithms
The I/OComplexity of Ordered BinaryDecision Diagram Manipulation
 UNIVERSITY OF AARHUS
, 1995
"... Ordered BinaryDecision Diagrams (OBDD) are the stateoftheart data structure for boolean function manipulation and there exist several software packages for OBDD manipulation. OBDDs have been successfully used to solve problems in e.g. digitalsystems design, verification and testing, in math ..."
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Cited by 28 (17 self)
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Ordered BinaryDecision Diagrams (OBDD) are the stateoftheart data structure for boolean function manipulation and there exist several software packages for OBDD manipulation. OBDDs have been successfully used to solve problems in e.g. digitalsystems design, verification and testing, in mathematical logic, concurrent system design and in artificial intelligence. The OBDDs used in many of these applications quickly get larger than the avaliable main memory and it becomes essential to consider the problem of minimizing the Input/Output (I/O) communication. In this paper we analyze why existing OBDD manipulation algorithms perform poorly in an I/O environment and develop new I/Oefficient algorithms.
Binary Decision Diagrams on Network of Workstations
 Proc. of International Conference on Computer Design (ICCD'96
, 1996
"... The success of all binary decision diagram (BDD) based synthesis and verification algorithms depend on the ability to efficiently manipulate very large BDDs. We present algorithms for manipulation of very large Binary Decision Diagrams (BDDs) on a network of workstations (NOW). ANOW provides a colle ..."
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Cited by 22 (0 self)
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The success of all binary decision diagram (BDD) based synthesis and verification algorithms depend on the ability to efficiently manipulate very large BDDs. We present algorithms for manipulation of very large Binary Decision Diagrams (BDDs) on a network of workstations (NOW). ANOW provides a collection of main memories and disks which can be used effectively to create and manipulate very large BDDs. To make efficient use of memory resources of a NOW, while completing execution in a reasonable amount of wall clock time, extension of breadthfirst technique is used to manipulate BDDs. BDDs are partitioned such that nodes for a set of consecutive variables are assigned to the same workstation. We present experimental results to demonstrate the capability of such an approach and point towards the potential impact for manipulating very large BDDs. 1 Introduction The manipulation of boolean functions is one of the most important operations in several areas of computeraided design such a...
High Performance BDD Package Based on Exploiting Memory Hierarchy
, 1996
"... The success of binary decision diagram (BDD) based algorithms for synthesis and/or verification depend on the availability of a high performance package to manipulate very large BDDs. Stateofthe art BDD packages, based on the conventional depthfirst technique, limit the size of the BDDs due to a ..."
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Cited by 20 (3 self)
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The success of binary decision diagram (BDD) based algorithms for synthesis and/or verification depend on the availability of a high performance package to manipulate very large BDDs. Stateofthe art BDD packages, based on the conventional depthfirst technique, limit the size of the BDDs due to a disorderly memory access patterns that results in unacceptably high elapsed time when the BDD size exceeds the main memory capacity. We present a high performance BDD package that enables manipulation of very large BDDs by using an iterative breadthfirst technique directed towards localizing the memory accesses to exploit the memory system hierarchy. The new memoryoriented performance features of this package are 1) an architecture independent customized memory management scheme, 2) the ability to issue multiple independent BDD operations (superscalarity), and 3) the ability to perform multiple BDD operations even when the operands of some BDD operations are the result of some other operat...
Parallel BreadthFirst BDD Construction
 In Ninth ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming
, 1997
"... With the increasing complexity of protocol and circuit designs, formal verification has become an important research area and binary decision diagrams (BDDs) have been shown to be a powerful tool in formal verification. This paper presents a parallel algorithm for BDD construction targeted at shared ..."
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Cited by 14 (2 self)
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With the increasing complexity of protocol and circuit designs, formal verification has become an important research area and binary decision diagrams (BDDs) have been shown to be a powerful tool in formal verification. This paper presents a parallel algorithm for BDD construction targeted at shared memory multiprocessors and distributed shared memory systems. This algorithm focuses on improving memory access locality through specialized memory managers and partial breadthfirst expansion, and on improving processor utilization through dynamic load balancing. The results on a shared memory system show speedups of over two on four processors and speedups of up to four on eight processors. The measured results clearly identify the main source of bottlenecks and point out some interesting directions for further improvements. 1 Introduction With the increasing complexity of protocol and circuit designs, formal verification has become an important research area. As an example, in 1994, In...
BDD Algorithms and Cache Misses
, 1996
"... Within the last few years, CPU speed has greatly overtaken memory speed. For this reason, implementation of symbolic algorithms with their extensive use of pointers and hashingmust be reexamined. ..."
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Cited by 12 (6 self)
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Within the last few years, CPU speed has greatly overtaken memory speed. For this reason, implementation of symbolic algorithms with their extensive use of pointers and hashingmust be reexamined.
BreadthFirst with DepthFirst BDD Construction: A Hybrid Approach
, 1997
"... This paper presents the technique of operator sifting as a new way of understanding both breadthfirst and depthfirst approaches to BDD construction. A new algorithm is also proposed to capture the breadthfirst approach's advantage of memory access locality, while keeping the depthfirst approach' ..."
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Cited by 8 (2 self)
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This paper presents the technique of operator sifting as a new way of understanding both breadthfirst and depthfirst approaches to BDD construction. A new algorithm is also proposed to capture the breadthfirst approach's advantage of memory access locality, while keeping the depthfirst approach's advantage of low memory overhead. Our preliminary experimental results show that our approach is generally faster than other implementations that rely exclusively on either breadthfirst or depthfirst approaches while keeping memory overhead comparable to that of depthfirst approaches.
Representations of Logic Functions using QRMDDs
 IEEE International Symposium on MultipleValued Logic, pp.261267
, 2002
"... This paper considers quasireduced multivalued decision diagrams with # bits (QRMDD(#)s) to represent twovalued logic functions. It shows relations between the numbers of nodes in QRMDD(#)s and values of # for benchmark functions; an upper bound on the number of nodes in the QRMDD(#); difference be ..."
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Cited by 6 (6 self)
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This paper considers quasireduced multivalued decision diagrams with # bits (QRMDD(#)s) to represent twovalued logic functions. It shows relations between the numbers of nodes in QRMDD(#)s and values of # for benchmark functions; an upper bound on the number of nodes in the QRMDD(#); difference between the upper bound and the number of nodes in the QRMDD(#)s for random functions; and the amount of total memory, evaluation time, and areatime complexity for QRMDD(#)s. Experimental results using standard benchmark functions show that the areatime complexity takes its minimum when # is between # and #.
Reordering Based Synthesis
 in Proc. of the 3rd Int. Workshop on Applications of the ReedMuller Expansion in Circuit Design (RM'97
, 1997
"... Reordering Based Synthesis (RBS) as an alternative approach to manipulate Decision Diagrams (DDs) is presented. Based on the concept of operation nodes a single "core" operation, i.e. an extended Level Exchange (LE), is sufficient to perform the usual synthesis operations on several types of DDs. RB ..."
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Cited by 4 (1 self)
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Reordering Based Synthesis (RBS) as an alternative approach to manipulate Decision Diagrams (DDs) is presented. Based on the concept of operation nodes a single "core" operation, i.e. an extended Level Exchange (LE), is sufficient to perform the usual synthesis operations on several types of DDs. RBS allows the integration of dynamic variable ordering (even) within a single synthesis operation (e.g. an ANDoperation) and thus provides the possibility of avoiding huge peak sizes during the construction. The optimization potential is significantly enlarged by allowing LEs even between operation nodes. A large number of experimental results for the BDD case confirm the validity of the concept.