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MAELSTROM: Efficient Simulation-Based Synthesis for Custom Analog Cells
, 1999
"... Analog synthesis tools have failed to migrate into mainstream use primarily because of difficulties in reconciling the simplified models required for synthesis with the industrial-strength simulation environments required for validation. MAELSTROM is a new approach that synthesizes a circuit using t ..."
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Cited by 18 (4 self)
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Analog synthesis tools have failed to migrate into mainstream use primarily because of difficulties in reconciling the simplified models required for synthesis with the industrial-strength simulation environments required for validation. MAELSTROM is a new approach that synthesizes a circuit using the same simulation environment created to validate the circuit. We introduce a novel genetic/ annealing optimizer, and leverage network parallelism to achieve efficient simulator-in-the-loop analog synthesis.
Predicting the Phase Noise and Jitter of PLL-Based Frequency Synthesizers. www.designers-guide.com
, 2003
"... Version 4g, August 2006 Two methodologies are presented for predicting the phase noise and jitter of a PLLbased frequency synthesizer using simulation that are both accurate and efficient. The methodologies begin by characterizing the noise behavior of the blocks that make up the PLL using transisto ..."
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Cited by 15 (2 self)
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Version 4g, August 2006 Two methodologies are presented for predicting the phase noise and jitter of a PLLbased frequency synthesizer using simulation that are both accurate and efficient. The methodologies begin by characterizing the noise behavior of the blocks that make up the PLL using transistor-level RF simulation. For each block, the phase noise or jitter is extracted and applied to a model for the entire PLL.
Computer-Aided Circuit Analysis Tools for RFIC Simulation: Algorithms, Features, and Limitations
- IEEE Trans. on Circuits and Systems II: analog and digital signal processing
, 2000
"... The design of the radio frequency (RF) section in a communication integrated circuit (IC) is a challenging problem. Although several computer-aided analysis tools are available for RFIC design, they are not effectively used, because there is a lack of understanding about their features and limitatio ..."
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Cited by 11 (3 self)
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The design of the radio frequency (RF) section in a communication integrated circuit (IC) is a challenging problem. Although several computer-aided analysis tools are available for RFIC design, they are not effectively used, because there is a lack of understanding about their features and limitations. These tools provide fast simulation of RFIC's. However, no single tool delivers a complete solution for RFIC design. This paper describes the shortcomings of conventional SPICE-like simulators and the analyses required for RF applications with an emphasis on accurate and efficient simulation of distortion and noise. Various analysis methods, such as harmonic balance, shooting method, mixed frequency-time methods, and envelope methods, that are currently available for RFIC simulation are presented. Commercial simulators are compared in terms of their functionalities and limitations. The key algorithmic features and the simulator-specific terminology are described. Index Terms---Circuit simulation, cyclostationary noise, distortion, envelope method, frequency-domain methods, harmonic distortion, intermodulation, linear time-varying analysis, mixed frequency-time methods, mixer noise, noise, periodic steady-state, phase noise, quasiperiodic steady-state, RFIC simulation, SPICE harmonic balance, shooting method, time-domain methods. I.
Augmentation of SPICE for Simulation of Circuits Containing Resonant Tunneling Diodes
, 2001
"... This paper describes the incorporation of an accurate physics-based model of the resonant tunneling diode (RTD) into Berkeley SPICE version 3F5 and addresses the related direct current (dc) and transient convergence problems caused by the negative differential resistance (NDR) and the exponential n ..."
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Cited by 4 (0 self)
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This paper describes the incorporation of an accurate physics-based model of the resonant tunneling diode (RTD) into Berkeley SPICE version 3F5 and addresses the related direct current (dc) and transient convergence problems caused by the negative differential resistance (NDR) and the exponential nature of the device characteristics. To circumvent the dc convergence problems, a new continuation technique using artificial parameter embedding and a current limiting algorithm are proposed. The studies made in this paper have shown that these techniques are superior to the in-built continuation methods of SPICE, such as Gmin-stepping and Source-stepping, for a large number of circuits of varying sizes. To improve transient convergence performance, the following three algorithms are added to SPICE: a modified forced-convergence algorithm, a new time-step adjustment algorithm, and a modified device voltage prediction algorithm.
Modeling Jitter in Pll-based Frequency Synthesizers
, 2003
"... A methodology is presented for modeling the jitter in a Phase-Locked Loop (PLL) that is both accurate and efficient. The methodology begins by characterizing the noise behavior of the blocks that make up the PLL using transistor-level simulation. For each block, the jitter is extracted and provided ..."
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Cited by 2 (0 self)
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A methodology is presented for modeling the jitter in a Phase-Locked Loop (PLL) that is both accurate and efficient. The methodology begins by characterizing the noise behavior of the blocks that make up the PLL using transistor-level simulation. For each block, the jitter is extracted and provided as a parameter to behavioral models for inclusion in a high-level simulation of the entire PLL. This approach is efficient enough to be applied to PLLs acting as frequency synthesizers with large divide ratios.
Behavioral Modeling and Simulation of Jitter and Phase Noise
- in Fractional-N PLL Frequency Synthesizer,” in IEEE International Behavioral Modeling and Simulation Workshop BMAS
, 2004
"... A methodology is presented for predicting the phase noise and jitter of a fractional-N PLL based frequency synthesizer. Based on the phase/jitter properties extracted from transistor level through simulation, a voltage-domain behavioral model can give phase noise performance of fractional-N PLL freq ..."
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Cited by 1 (0 self)
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A methodology is presented for predicting the phase noise and jitter of a fractional-N PLL based frequency synthesizer. Based on the phase/jitter properties extracted from transistor level through simulation, a voltage-domain behavioral model can give phase noise performance of fractional-N PLL frequency synthesizers in system level accurately, while the simulation efficiency is also improved by merging the VCO block operated at the highest frequency into those operated at lower frequency. Comparing to phase-domain simulation, the improved voltage-domain models do a better job of capturing the details of the behavior of the loop, details such as the signal capturing and escaping traces in fractional-N frequency synthesizer. 1.
Measuring S-Parameters of a Differential Mixer The Testbench
, 2001
"... Last updated on May 11, 2006. You can find the most recent version at www.designers-guide.org. Contact the author via ..."
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Last updated on May 11, 2006. You can find the most recent version at www.designers-guide.org. Contact the author via
A Test Bench for Differential Circuits
, 2002
"... Introduces a new test bench constructed using ideal baluns that makes the simulation of differential circuits easier and less error prone. ..."
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Introduces a new test bench constructed using ideal baluns that makes the simulation of differential circuits easier and less error prone.
Uur9r+vtr... 16 Vqr
, 2002
"... ctices, this is a slow and error prone process. The initial design of the model is done with Matlab. Typically, at this point a model requires on the order of a few hundred lines of code. Once the equations are set, the process of converting the model to C begins. This involves computing and codin ..."
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ctices, this is a slow and error prone process. The initial design of the model is done with Matlab. Typically, at this point a model requires on the order of a few hundred lines of code. Once the equations are set, the process of converting the model to C begins. This involves computing and coding all the derivatives, performing careful optimizations, and interfacing the model to the simulator. The fact that the models are hand coded implies that the optimization involves a difficult trade-off between efficiency and the time required to implement and support the model. Also, the conversion from Matlab to C is a potential source of many errors. The combination of these factors imply that models are updated infrequently and so designers often do not get access to compiled models that include important effects until years after the effects have been identified. Further, the high cost of installing and maintaining models implies that only a few models are provided with commercial si
1 MODELING JARGONS 1.1 SPICE SIMULATOR AND SPICE MODEL
"... Just about all electrical engineers have some form of encounter with SPICE, Simulation Program with Integrated Circuit Emphasis. It could be in a homework assignment during the undergraduate studies, or as an essential part of circuit design at work. As its full name suggests, SPICE is a computer pr ..."
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Just about all electrical engineers have some form of encounter with SPICE, Simulation Program with Integrated Circuit Emphasis. It could be in a homework assignment during the undergraduate studies, or as an essential part of circuit design at work. As its full name suggests, SPICE is a computer program that accepts a circuit schematic as input and outputs the simulated circuit behaviors. The simulation can be performed under the nonlinear dc, nonlinear transient and linearized ac operating conditions. The circuit may contain resistors, capacitors, inductors, mutual inductors, independent voltage and current sources, dependent sources, lossless and lossy transmission lines, switches, uniform distributed RC lines, and various semiconductor devices including MOSFETs (metal oxide semiconductor fieldeffect transistors). The original SPICE program, SPICE 1, was developed at University of California, Berkeley, and released for public use in May, 1972. By 1975, after the next major release, called SPICE2, SPICE was in widespread use and adopted by most integrated circuit manufacturers. SPICE2 was written in Fortran. With the advent of UNIX computers in the 1980s it became increasingly obvious that SPICE

