Abstract—We describe a distributed position-based network protocol optimized for minimum energy consumption in mobile wireless networks that support peer-to-peer communications. Given any number of randomly deployed nodes over an area, we illustrate that a simple local optimization scheme executed at each node guarantees strong connectivity of the entire network and attains the global minimum energy solution for stationary networks. Due to its localized nature, this protocol proves to be self-reconfiguring and stays close to the minimum energy solution when applied to mobile networks. Simulation results are used to verify the performance of the protocol. Index Terms — Distributed algorithms, energy management, graph theory, mobile communication, network fault tolerance, networks, packet radio, portable radio communication, power measurement, protocols, radio repeaters. I.

Rapid growth in the portable communications market has pushed designers to seek low-cost, low-power, highly integrated solutions for the RF transceiver. A number of recent efforts have concentrated on integrating many of the discrete radio receiver components in a low-cost silicon process such as CMOS [1][2]. This paper describes a prototype of a monolithic CMOS receiver that combines RF and baseband functionality by taking the carrier signal at the LNA input and producing a 10-bit digital baseband waveform. A Wide-Band Intermediate Frequency Double Conversion (WBIFDC) architecture is utilized to remove the need for external narrow-band IF filters.

A dual-band receiver employs the Weaver architecture with two tuned radio-frequency stages and a common intermediate-frequency stage to allow operation with 900-MHz and 1.8-GHz standards while using only two oscillators. Fabricated in a digital 0.6-"m CMOS technology, the receiver achieves an overall noise figure of 4.7 dB and input third intercept point of 08 dBm at 900 MHz, and 4.9 dB and 06 dBm at 1.8 GHz. The voltage gain is 23 dB with a power dissipation of 75 mW from a 3-V supply.

Recent papers reporting CMOS RF building blocks have aroused great expectations for RF receivers using deepsubmicron technologies. This paper examines the trend in CMOS scaling, in order to establish the required current levels and achievable performance for different feature sizes, if robust, easily manufacturable designs are to be implemented for cellular applications. The boundary conditions (system-level constraints) for such designs, in terms of the number of trimmed and untrimmed external components and the roles they play in relaxing active circuit requirements, are emphasized throughout to make comparison of active RF circuits meaningful. At 1 GHz, 0.25- m CMOS appears to be the threshold for robust, low-NF RF front ends with current consumption competitive with today's BJT implementations. Index Terms---CMOS RF, low-noise amplifier, low-power design, mixer, prescaler, RF-IC, technology scaling, wireless communication. I. INTRODUCTION S CALING of CMOS technologies has defie...

This paper presents a 2 GHz image rejection (IR) downconverter implemented in a 0.65 m CMOS technology. It maintains high IR ratio against the process and temperature variations if the on-chip passive RC components are relatively matched. The experimental circuit provides an IR ratio of 40.8 dB without any off-chip filtering or tuning, and dissipates 91 mW at 3.3 V.

: Issues associated with the integration of transceiver components on to a single silicon substrate are discussed. In particular, recently proposed receiver and transmitter architectures for high integration are examined on the promise of providing multistandard capability. In addition, existing barriers to lower power transceiver operation are examined as well as some proposed directions for future integrated transceiver research and development. I. Introduction Explosive growth in the portable communications market has led to consumer demand for low-cost, small-form factor, low-power transceivers [1]. In addition, developers of new wireless applications are looking to provide consumers with both the convenience of added connectivity and the benefit of additional services provided by a transceiver able to operate off of multiple RF standards. The VLSI capabilities of CMOS make this technology particularly well-suited for very high levels of mixed signal radio integration [2][3][4][5...

With Q's in the tens to hundreds of thousands, micromachined vibrating resonators are proposed as IC-compatible tanks for use in the highly selective filters of communications subsystems. To date, bandpass filters consisting of spring-coupled micromechanical resonators have been demonstrated in a frequency range from HF to VHF. In particular, two-resonator micromechanical bandpass filters have been demonstrated with frequencies up to 35 MHz, percent bandwidths on the order of 0.2%, and insertion losses less than 2 dB. In addition, free-free beam, single-pole resonators have recently been realized with frequencies up to 92 MHz and Q's around 8,000. Evidence suggests that the ultimate frequency range of this high-Q tank technology depends upon material limitations, as well as design constraints---in particular, to the degree of electromechanical coupling achievable in micro-scale resonators. Index Terms---resonators, microelectromechanical devices, micromachining, MEMS, micromechanical, bandpass, filter, fabrication, communications, transceiver, low power. 1.

First of all, I would like to express my sincere appreciation for my research advisor, Professor Ali Hajimiri, for his guidance and support over this five year journey. I would like to thank him for bringing me into the High-Speed Integrated Circuits Group at Caltech, where I have been able to work in my most favorite research field. Inspirations drawn from the fruitful and enlightening technical discussions with him have helped me overcome plenty of difficulties encountered in the design and experiments and have been crucial in making those projects successful. I am especially grateful for his constant encouragement, which will continue to promote my desire to do my best in my future career. I would like to thank Professor David Rutledge and Dr. Sander Weinreb. I have learned a lot in the technical discussions with them. Their valuable suggestions as well as support in providing test equipments in the Caltech Microwave Laboratory have appreciably accelerated the progress of my research projects. I feel very lucky to have worked with the current and previous members of Caltech

– Basic concepts and definitions – Analytic signals and Hilbert transforms – Frequency translations and mixing

We report an integrated RF circuit topology that can be used to realize low voltage (i.e., 1 V) RF integrated circuits. The scheme uses on-chip capacitively coupled resonating elements to dc isolate circuit elements that under the present art are connected in series and share a common dc current. The topology is applied to several commonly used RF integrated circuit topologies (i.e., low-noise amplifiers and mixers). A comparison is made between a low-voltage version of a cascode amplifier and the classic cascode amplifier. The low-voltage version (i.e., 1 V) is shown to have a similar distortion specification as the classic 2-V low-noise cascode amplifier. The low-voltage version has a 0.22-dB improvement in noise figure. Index Terms---Analog IC design, low voltage, radio frequency IC's. I. INTRODUCTION T HE ERA of wireless communications is expanding in an unprecedented fashion. The key issues involved in designing the wireless systems are: 1) integrating the digital base band su...