Many computationally-intensive tasks spend nearly all of their execution time within a small fraction of the executable code. A new hardware/software system, called PRISM, is presented which improves the performance of many of these computationally intensive tasks by utilizing information extracted at compile-time to synthesize new operations which augment the functionality of a core processor. By integrating adaptation into a general-purpose computer, one can not only reap the performance benefits of applicationspecific processors, but also retain the general-purpose nature by accommodating a wide variety of tasks. Newly synthesized operations are targeted to RAM-based logic devices which provide a mechanism for fast processor reconfiguration. A proof-of-concept system called PRISM-I, consisting of a specialized C configuration compiler and a reconfigurable hardware platform is presented. Compilation and performance results are provided which confirm the concept viability, and demonstrate significant speed-up over conventional general-purpose architectures. Keywords: Adaptive Architectures, Reconfigurable Instruction Sets, Performance Improvements, General-Purpose Computers, Logic Synthesis I

This paper presents a new intermediate format called Static Single Information (SSI) form. SSI form generalizes the traditional concept of a variable de nition to include all information de nition points, or points where the analysis may obtain information about the value in a variable. Information de nition points include conditional branches as well as assignments. Because SSI form provides a new name for each variable at each information de nition point, it provides excellent support for both predicated analyses, which exploit information gained from conditionals, and backwards dataow analyses.