In this paper we propose a novel technique for programming floating gate MOS transistors (FGMOS) in low-power design. By threshold-shifting low-power operation is possible with the cost of an extra polysilicon layer. Combining the FGMOS transistor with a UV-activated (UV) conductance give rise to the UV-light programmable floating-gate MOS (FGUVMOS) transistor. The FGUVMOS transistor is utilized to increase the efficiency at low supply voltages.

We have developed an amplifier which removes its "offset" as a natural part of its operation by modifying the charge on a floating gate. The charge on the floating gate is adapted by a combination of electron tunneling and hot-electron injection, resulting in a nonlinear high-pass filter with a cutoff frequency less than 1 Hz. We show experimental data from this autozeroing amplifier for various input waveforms, and an analytical model which fits the output waveforms. This autozeroing amplifier is a single-input case of a continuous learning circuit. 1. INTRODUCTION We have developed an amplifier which removes its "offsets" as a natural part of its operation by modifying the charge on a floating gate. Offsets, including drifts due to temperature, are often a difficult problem in designing analog circuits, and it is desirable if not essential to eliminate them. Previous autozeroing techniques have relied on clocking schemes which periodically compute the offset and then subtract it fro...

We have developed a bandpass floating-gate amplifier that uses tunneling and pFET hot-electron injection to set its dc operating point adaptively. Because the hot-electron injection is an inherent part of the pFET's behavior, we obtain this adaptation with no additional circuitry. Because the gate currents are small, the circuit exhibits a high-pass characteristic with a cutoff frequency less than 1 Hz. The high-frequency cutoff is controlled electronically, as is done in continuous-time filters. We have derived analytical models that completely characterize the amplifier and that are in good agreement with experimental data for a wide range of operating conditions and input waveforms. This autozeroing floating-gate amplifier demonstrates how to use continuous -time floating-gate adaptation in amplifier design.

We describe a class of nonlinear circuits that accurately embody product-of-power-law relationships in the current signal domain. We call these circuits multiple-input translinear element (MITE) networks. A MITE is a circuit element that produces an output current that is exponenial in a weighted sum of its input voltages. We describe intuitively the basic operation of MITE networks and we show experimental data from a squaring-reciprocal circuit breadboarded from bipolar-- floating-gate MOS (biFGMOS) MITEs that we fabricated in a 2--m double-poly CMOS process available through MOSIS. 1. PRODUCT-OF-POWER-LAW CIRCUITS Products, quotients, and power-law relationships figure prominently in many signal and information processing algorithms. Consequently, analog circuits embodying such relaionships are important components in the construction of analog VLSI information processing systems. In the Nonlinear Circuits Handbook from Analog Devices, we find the following clear description of a ...

A programming technique for controlling the floating gates (FG) in ultra low-voltage (ULV) floating-gate circuits is presented. Simple ultra low-voltage floatinggate current scaling and level shifting circuits are discussed. The current scaling and level shifting are accomplished using only minimum sized transistors and floating capacitors. Floating-gate current multiplier and divider circuits are described. Measured results are provided.

An area efficient technique for tuning floatinggate circuits is described. The effective threshold voltage seen from a control gate can be programmed to virtually any value. The floating-gate transistor (FGMOS) may be used to implement low-power/low-voltage digital-and/or analog circuits.

Competitive learning is a general technique for training clustering and classification networks. We have developed an 11-transistor silicon circuit, that we term an automaximizing bump circuit, that uses silicon physics to naturally implement a similarity computation, local adaptation, simultaneous adaptation and computation and nonvolatile storage. This circuit is an ideal building block for constructing competitive-learning networks. We illustrate the adaptive nature of the automaximizing bump in two ways. First, we demonstrate a silicon competitive-learning circuit that clusters one-dimensional (1-D) data. We then illustrate a general architecture based on the automaximizing bump circuit; we show the effectiveness of this architecture, via software simulation, on a general clustering task. We corroborate our analysis with experimental data from circuits fabricated in a 0.35-µm CMOS process.

We propose a low-power, analog and mixed-mode, implementation of particle filters. Low-power analog implementation of nonlinear functions such as exponential and arctangent functions is done using multiple-input translinear element (MITE) networks. These nonlinear functions are used to calculate the probability densities in the particle filter. A bearings-only tracking problem is simulated to present the proposed low-power implementation of the particle filter algorithm. 1.

Since the first reported floating-gate structure in 1967, floatinggate transistors have been used widely to store digital information for long periods in structures such as EPROMs and EEPROMs. Recently, floating-gate devices have found applications as analog memories, analog and digital circuit elements, and adaptive processing elements. Floating-gate devices have found commerical applications, e.g. ISD, for long-term non-volatile information storage devices for analog applications. The focus of floating-gate devices has been towards fabrication in standard CMOS processes, as opposed to the specialized processes for fabricating digital nonvolatile memories. Floating-gate circuits can be designed at any or all of three levels: analog memory elements, capacitive-based circuit elements, and adaptive circuit elements. In 1967, Kahng and Sze reported the first floating-gate structure as a mechanism for nonvolatile information storage [1]. Since then, floating-gate transistors have been use...

In this paper we present both novel current mirrors and a novel pseudo differential pairs using floating-gate transistors available in standard double-poly CMOS. The circuits are modeled and simulated down to 50mV supply voltage. Wide dynamic range combined with high linearity is achieved with Early effect compensation using minimum transistors.