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26
Optimal upward planarity testing of singlesource digraphs
 SIAM Journal on Computing
, 1998
"... Abstract. A digraph is upward planar if it has a planar drawing such that all the edges are monotone with respect to the vertical direction. Testing upward planarity and constructing upward planar drawings is important for displaying hierarchical network structures, which frequently arise in softwar ..."
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Cited by 34 (4 self)
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Abstract. A digraph is upward planar if it has a planar drawing such that all the edges are monotone with respect to the vertical direction. Testing upward planarity and constructing upward planar drawings is important for displaying hierarchical network structures, which frequently arise in software engineering, project management, and visual languages. In this paper we investigate upward planarity testing of singlesource digraphs; we provide a new combinatorial characterization of upward planarity and give an optimal algorithm for upward planarity testing. Our algorithm tests whether a singlesource digraph with n vertices is upward planar in O(n) sequential time, and in O(log n) time on a CRCW PRAM with n log log n / log n processors, using O(n) space. The algorithm also constructs an upward planar drawing if the test is successful. The previously known best result is an O(n2)time algorithm by Hutton and Lubiw [Proc. 2nd ACM–SIAM Symposium on Discrete Algorithms, SIAM, Philadelphia, 1991, pp. 203–211]. No efficient parallel algorithms for upward planarity testing were previously known.
Parallel Implementation of Algorithms for Finding Connected Components in Graphs
, 1997
"... In this paper, we describe our implementation of several parallel graph algorithms for finding connected components. Our implementation, with virtual processing, is on a 16,384processor MasPar MP1 using the language MPL. We present extensive test data on our code. In our previous projects [21, 22, ..."
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Cited by 25 (1 self)
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In this paper, we describe our implementation of several parallel graph algorithms for finding connected components. Our implementation, with virtual processing, is on a 16,384processor MasPar MP1 using the language MPL. We present extensive test data on our code. In our previous projects [21, 22, 23], we reported the implementation of an extensible parallel graph algorithms library. We developed general implementation and finetuning techniques without expending too much effort on optimizing each individual routine. We also handled the issue of implementing virtual processing. In this paper, we describe several algorithms and finetuning techniques that we developed for the problem of finding connected components in parallel; many of the finetuning techniques are of general interest, and should be applicable to code for other problems. We present data on the execution time and memory usage of our various implementations.
Parallel Open Ear Decomposition with Applications to Graph Biconnectivity and Triconnectivity
 Synthesis of Parallel Algorithms
, 1992
"... This report deals with a parallel algorithmic technique that has proved to be very useful in the design of efficient parallel algorithms for several problems on undirected graphs. We describe this method for searching undirected graphs, called "open ear decomposition", and we relate this decompos ..."
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Cited by 25 (9 self)
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This report deals with a parallel algorithmic technique that has proved to be very useful in the design of efficient parallel algorithms for several problems on undirected graphs. We describe this method for searching undirected graphs, called "open ear decomposition", and we relate this decomposition to graph biconnectivity. We present an efficient parallel algorithm for finding this decomposition and we relate it to a sequential algorithm based on depthfirst search. We then apply open ear decomposition to obtain an efficient parallel algorithm for testing graph triconnectivity and for finding the triconnnected components of a graph.
The Complexity of Planarity Testing
, 2000
"... We clarify the computational complexity of planarity testing, by showing that planarity testing is hard for L, and lies in SL. This nearly settles the question, since it is widely conjectured that L = SL [25]. The upper bound of SL matches the lower bound of L in the context of (nonuniform) circ ..."
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Cited by 23 (7 self)
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We clarify the computational complexity of planarity testing, by showing that planarity testing is hard for L, and lies in SL. This nearly settles the question, since it is widely conjectured that L = SL [25]. The upper bound of SL matches the lower bound of L in the context of (nonuniform) circuit complexity, since L/poly is equal to SL/poly. Similarly, we show that a planar embedding, when one exists, can be found in FL SL . Previously, these problems were known to reside in the complexity class AC 1 , via a O(log n) time CRCW PRAM algorithm [22], although planarity checking for degreethree graphs had been shown to be in SL [23, 20].
A Simple Parallel Algorithm for the SingleSource Shortest Path Problem on Planar Digraphs
 OF LNCS
, 1996
"... We present a simple parallel algorithm for the singlesource shortest path problem in planar digraphs with nonnegative real edge weights. The algorithm runs on the EREW PRAM model of parallel computation in O((n 2ffl +n 1\Gammaffl ) log n) time, performing O(n 1+ffl log n) work for any 0 ! f ..."
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Cited by 17 (3 self)
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We present a simple parallel algorithm for the singlesource shortest path problem in planar digraphs with nonnegative real edge weights. The algorithm runs on the EREW PRAM model of parallel computation in O((n 2ffl +n 1\Gammaffl ) log n) time, performing O(n 1+ffl log n) work for any 0 ! ffl ! 1=2. The strength of the algorithm is its simplicity, making it easy to implement, and presumably quite efficient in practice. The algorithm improves upon the work of all previous algorithms. The work can be further reduced to O(n 1+ffl ), by plugging in a less practical, sequential planar shortest path algorithm. Our algorithm is based on a region decomposition of the input graph, and uses a wellknown parallel implementation of Dijkstra's algorithm.
Linear Time Algorithm to Recognize Clustered Planar Graphs and its Parallelization
 98, 3rd Latin American symposium on theoretical informatics
, 1998
"... We develop a linear time algorithm for the following problem: Given a graph G and a hierarchical clustering of the vertices, such that all clusters induce connected subgraphs, determine whether G can be embedded into the plane, such that no cluster has a hole. This is an improvement to the O(n 2 )a ..."
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Cited by 14 (0 self)
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We develop a linear time algorithm for the following problem: Given a graph G and a hierarchical clustering of the vertices, such that all clusters induce connected subgraphs, determine whether G can be embedded into the plane, such that no cluster has a hole. This is an improvement to the O(n 2 )algorithm of Q.W. Feng et al. [6] and the algorithm of Lengauer [12].
Implementation of Parallel Graph Algorithms on a Massively Parallel SIMD Computer with Virtual Processing
, 1995
"... We describe our implementation of several PRAM graph algorithms on the massively parallel computer MasPar MP1 with 16,384 processors. Our implementation incorporated virtual processing and we present extensive test data. In a previous project [13], we reported the implementation of a set of paralle ..."
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Cited by 14 (3 self)
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We describe our implementation of several PRAM graph algorithms on the massively parallel computer MasPar MP1 with 16,384 processors. Our implementation incorporated virtual processing and we present extensive test data. In a previous project [13], we reported the implementation of a set of parallel graph algorithms with the constraint that the maximum input size was restricted to be no more than the physical number of processors on the MasPar. The MasPar language MPL that we used for our code does not support virtual processing. In this paper, we describe a method of simulating virtual processors on the MasPar. We recoded and finetuned our earlier parallel graph algorithms to incorporate the usage of virtual processors. Under the current implementation scheme, there is no limit on the number of virtual processors that one can use in the program as long as there is enough main memory to store all the data required during the computation. We also give two general optimization techniq...
Optimal randomized EREW PRAM algorithms for finding spanning forests
 J. Algorithms
, 2000
"... We present the first randomized O(log n) time and O(m+n) work EREW PRAM algorithm for finding a spanning forest of an undirected graph G = (V; E) with n vertices and m edges. Our algorithm is optimal with respect to time, work and space. As a consequence we get optimal randomized EREW PRAM algori ..."
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Cited by 10 (1 self)
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We present the first randomized O(log n) time and O(m+n) work EREW PRAM algorithm for finding a spanning forest of an undirected graph G = (V; E) with n vertices and m edges. Our algorithm is optimal with respect to time, work and space. As a consequence we get optimal randomized EREW PRAM algorithms for other basic connectivity problems such as finding a bipartite partition, finding bridges and biconnected components, finding Euler tours in Eulerian graphs, finding an ear decomposition, finding an open ear decomposition, finding a strong orientation, and finding an stnumbering.
Evaluating monotone circuits on cylinders, planes, and torii
 In Proc. 23rd Symposium on Theoretical Aspects of Computing (STACS), Lecture Notes in Computer Science
, 2006
"... Abstract. We revisit monotone planar circuits MPCVP, with special attention to circuits with cylindrical embeddings. MPCVP is known to be in NC 3 in general, and in LogDCFL for the special case of upward stratified circuits. We characterize cylindricality, which is stronger than planarity but strict ..."
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Cited by 10 (2 self)
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Abstract. We revisit monotone planar circuits MPCVP, with special attention to circuits with cylindrical embeddings. MPCVP is known to be in NC 3 in general, and in LogDCFL for the special case of upward stratified circuits. We characterize cylindricality, which is stronger than planarity but strictly generalizes upward planarity, and make the characterization partially constructive. We use this construction, and four key reduction lemmas, to obtain several improvements. We show that monotone circuits with embeddings that are stratified cylindrical, cylindrical, planar oneinputface and focused can be evaluated in LogDCFL, AC 1 (LogDCFL), LogCFL and AC 1 (LogDCFL) respectively. We note that the NC 3 algorithm for general MPCVP is in AC 1 (LogCFL) =SAC 2.Finally, we show that monotone circuits with toroidal embeddings can, given such an embedding, be evaluated in NC. 1