[LEC-67] linear time serial algorithm for testing planarity of graphs uses the linear time serial algorithm of [ET-76] for st-numbering. This st-numbering algorithm is based on depth-first search (DFS). A known conjecture states that DFS, which is a key technique in designing serial algorithms, is not amenable to poly-log time parallelism using "around linearly" (or even polynomially) many processors. The first contribution of this paper is a general method for searching efficiently in parallel undirected graphs, called ear-decomposition search (EDS). The second contribution demonstrates the applicability of this search method. We present an efficient parallel algorithm for st-numbering in a biconnected graph. The algorithm runs in logarithmic time using a linear number of processors on a concurrentread concurrent-write (CRCW) PRAM. An efficient parallel algorithm for the problem did not exist before. The problem was not even known to be in NC. 1. Introduction We define the problems ...

. We present a parallel algorithm for finding triconnected components on a CRCW PRAM. The time complexity of our algorithm is O(log n) and the processor-time product is O((m + n) log log n) where n is the number of vertices, and m is the number of edges of the input graph. Our algorithm, like other parallel algorithms for this problem, is based on open ear decomposition but it employs a new technique, local replacement, to improve the complexity. Only the need to use the subroutines for connected components and integer sorting, for which no optimal parallel algorithm that runs in O(log n) time is known, prevents our algorithm from achieving optimality. 1. Introduction. A connected graph G = (V; E) is k-vertex connected if it has at least (k + 1) vertices and removal of any (k \Gamma 1) vertices leaves the graph connected. Designing efficient algorithms for determining the connectivity of graphs has been a subject of great interest in the last two decades. Applications of graph connect...

Abstract. Parallel algorithms for several graph and geometric problems are presented, including transitive closure and topological sorting in planar st-graphs, preprocessing planar subdivisions for point location queries, and construction of visibility representations and drawings of planar graphs. Most of these algorithms achieve optimal O(log n) running time using n = log n processors in the EREW PRAM model, n being the number of vertices. Key words. parallel algorithms, parallel computation, graph algorithms, planar st-graphs, transitive closure, reachability, planar point location, computational geometry, fractional cascading, graph drawing, visibility AMS(MOS) subject classi cations. 68E05, 68C05, 68C25 1. Introduction. Planar st-graphs

We present a new algorithm for finding the triconnected components of an undirected graph. The algorithm is based on a method of searching graphs called ‘open ear decomposition’. A parallel implementation of the algorithm on a CRCW PRAM runs in O(log 2 n) parallel time using O(n + m) processors, where n is the number of vertices and m is the number of edges in the graph.

We clarify the computational complexity of planarity testing, by showing that planarity testing is hard for L, and lies in SL. This nearly settles the question, since it is widely conjectured that L = SL [25]. The upper bound of SL matches the lower bound of L in the context of (nonuniform) circuit complexity, since L/poly is equal to SL/poly. Similarly, we show that a planar embedding, when one exists, can be found in FL SL . Previously, these problems were known to reside in the complexity class AC 1 , via a O(log n) time CRCW PRAM algorithm [22], although planarity checking for degree-three graphs had been shown to be in SL [23, 20].

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Many well-known problems in Artificial Intelligence can be formulated in terms of systems of constraints. The problem of testing the satisfiability of propositional formulae (SAT) is of special importance due to its numerous applications in theoretical computer science and Artificial Intelligence. A brute-force algorithm for SAT will have exponential time complexity O(2 n), where n is the number of Boolean variables of the formula. Unfortunately, more sophisticated approaches such as resolution result in similar performance in the worst case. In this paper we present a simple and relatively efficient parallel divide-and-conquer method to solve various subclasses of SAT. The dissection stage of the parallel algorithm splits the original formula into smaller subformulae with only a bounded number of interacting variables. In particular, we derive a parallel algorithm for the class of formulae whose corresponding graph representation is planar. Our parallel algorithm for planar 3-SAT has worst-case performance of 2 O( √ n) on a PRAM (parallel random access model) computer. Applications of our method to constraint satisfaction problems are discussed.

Geometric complexity theory (GCT) is an approach to the P vs. NP and related problems through algebraic geometry and representation theory. This article gives a high-level exposition of the basic plan of GCT based on the principle, called the flip, without assuming any background in algebraic geometry or representation theory. Contents 1

We present a new algorithm to test whether a given graph G is planar and to compute a planar embedding G of G if such an embedding exists. Our algorithm utilizes a fundamentally new approach based on graph separators to obtain such an embedding. The I/O-complexity of our algorithm is O(sort(N)). A simple simulation technique reduces the I/O-complexity of our algorithm to O(perm(N)). We prove a matching lower bound of W(perm(N)) I/Os for computing a planar embedding of a given planar graph.

This paper presents a new parallel algorithm for planarity testing based upon the work of Klein and Reif [14]. Our new approach gives correct answers on instances that provoke false positive and false negative results using Klein and Reif's algorithm. The new algorithm has the same complexity bounds as Klein and Reif's algorithm and runs in O n processors of a Concurrent Read Exclusive Write (CREW) Parallel RAM (PRAM). Implementations of the major steps of this parallel algorithm exist for symmetric multiprocessors and exhibit speedup when compared to the best sequential approach. Thus, this new parallel algorithm for planarity testing lends itself to a high-performance shared-memory implementation.