We give a general complexity classification scheme for monotone computation, including monotone space-bounded and Turing machine models not previously considered. We propose monotone complexity classes including mAC i , mNC i , mLOGCFL, mBWBP , mL, mNL, mP , mBPP and mNP . We define a simple notion of monotone reducibility and exhibit complete problems. This provides a framework for stating existing results and asking new questions. We show that mNL (monotone nondeterministic log-space) is not closed under complementation, in contrast to Immerman's and Szelepcs 'enyi's nonmonotone result [Imm88, Sze87] that NL = co-NL; this is a simple extension of the monotone circuit depth lower bound of Karchmer and Wigderson [KW90] for st-connectivity. We also consider mBWBP (monotone bounded width branching programs) and study the question of whether mBWBP is properly contained in mNC 1 , motivated by Barrington's result [Bar89] that BWBP = NC 1 . Although we cannot answer t...

The 1980's saw rapid and exciting development of techniques for proving lower bounds in circuit complexity. This pace has slowed recently, and there has even been work indicating that quite different proof techniques must be employed to advance beyond the current frontier of circuit lower bounds. Although this has engendered pessimism in some quarters, there have in fact been many positive developments in the past few years showing that significant progress is possible on many fronts. This paper is a (necessarily incomplete) survey of the state of circuit complexity as we await the dawn of the new millennium.

Data structures for Boolean functions build an essential component of design automation tools, especially in the area of logic synthesis. The state of the art data structure is the ordered binary decision diagram (OBDD), which results from general binary decision diagrams (BDDs), also called branching programs, by ordering restrictions. In the context of EXOR-based logic synthesis another type of decision diagram (DD), called (ordered) functional decision diagram ((O)FDD) becomes increasingly important. We study the relation between (ordered, free) BDDs and FDDs. Both, BDDs and FDDs, result from DDs by defining the represented function in different ways. If the underlying DD is complete, the relation between both types of interpretation can be described by a Boolean transformation . This allows us to relate the FDD-size of f and the BDD-size of (f) also in the case that the corresponding DDs are free or ordered, but not (necessarily) complete. We use this property to derive...

We show that the permanent cannot be computed by uniform constant-depth threshold circuits of size T (n) for any function T such that for all k, T (k) (n) = o(2 n ). More generally, we show that any problem that is hard for the complexity class C=P requires circuits of this size (on the uniform constant-depth threshold circuit model). In particular, this lower bound applies to any problem that is hard for the complexity classes PP or #P.

Continuing a line of investigation that has studied the function classes #P [Val79b], #SAC [Val79a, Vin91, AJMV], #L [AJ93b, Vin91, AO94], and #NC [CMTV96], we study the class of functions . One way to define #AC is as the class of functions computed by constant-depth polynomial-size arithmetic circuits of unbounded fan-in addition and multiplication gates. In contrast to the preceding # Part of this research was done while visiting the University of Ulm under an Alexander von Humboldt Fellowship.

We show that neural networks with three-times continuously differentiable activation functions are capable of computing a certain family of n-bit Boolean functions with two gates, whereas networks composed of binary threshold functions require at least \Omega\Gammaast n) gates. Thus, for a large class of activation functions, analog neural networks can be more powerful than discrete neural networks, even when computing Boolean functions. 1 Introduction. Artificial neural networks have become a popular model for machine learning and many results have been obtained regarding their application to practical problems. Typically, the network is trained to encode complex associations between inputs and outputs during supervised training cycles, where the associations are encoded by the weights of the network. Once trained, the network will compute an input/output mapping which (hopefully) is a good approximation of the original mapping. 1 Partially supported by NSF Grant CCR-9114545 In thi...

This paper is based on my lecture [26]. It examines the problem of proving non-trivial lower bounds for the length of proofs in propositional logic from the perspective of methods available rather than surveying known partial results (i.e., lower bounds for weaker proof systems). We discuss neither motivations for proving lower bounds for propositional logic nor relations to other problems in logic or complexity theory. The reader is referred to [20] for the background information (as well as for all details missing in this paper). The paper is aimed at curious non-specialists. The style of our exposition is accordingly informal at places and we do not burden the text (especially in the introduction) with exhausting references not directly related to our main objective. The reader starving for details can find them, together with all original references, in [20] (see also expository articles [25, 32]). Introduction

Razborov and Rudich identified an imposing barrier that stands in the way of progress toward the goal of proving superpolynomial lower bounds on circuit size. Their work on “natural proofs” applies to a large class of arguments that have been used in complexity theory, and shows that no such argument can prove that a problem requires circuits of superpolynomial size, even for some very restricted classes of circuits (under reasonable cryptographic assumptions). This barrier is so daunting, that some researchers have decided to focus their attentions elsewhere. Yet the goal of proving circuit lower bounds is of such importance, that some in the community have proposed concrete strategies for surmounting the obstacle. This lecture will discuss some of these strategies, and will dwell at length on a recent approach proposed by Michal Koucky and the author.

We show that the result of Barrington, Straubing and Thérien [5] provides, as a direct corollary, an exponential lower bound for the size of depth-two MOD 6 circuits computing the AND function. This problem was solved, in a more general way, by Krause and Waack [8]. We point out that all known lower bounds rely on the special form of the MOD 6 gate occurring at the bottom of the circuits, so that in fact, proving a lower bound for "general" MOD 6 circuits of depth two is still an open question.

Modular gates are known to be immune for the random restriction techniques of Ajtai (1983), Furst, Saxe, Sipser (1984), Yao (1985) and Hastad (1986). We demonstrate here a random clustering technique which overcomes this diculty and is capable to prove generalizations of several known modular circuit lower bounds of Barrington, Straubing, Therien (1990), Krause and Pudlak (1994), and others, characterizing symmetric functions computable by small (MOD p ; AND t ; MODm ) circuits. Applying a degree-decreasing technique together with random restriction methods for the AND gates at the bottom level, we also prove a hard special case of the Constant Degree Hypothesis of Barrington, Straubing, Therien (1990), and other related lower bounds for certain (MOD p ; MODm ; AND) circuits. Most of the previous lower bounds on circuits with modular gates used special denitions of the modular gates (i.e., the gate outputs one if the sum of its inputs is divisible by m, or is not divisible by m), and were not valid for more general MODm gates. Our methods are applicable, and our lower bounds are valid, for the most general modular gates as well. 1