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Modeling and Verifying Systems using a Logic of Counter Arithmetic with Lambda Expressions and Uninterpreted Functions
, 2002
"... In this paper, we present the logic of Counter arithmetic with Lambda expressions and Uninterpreted functions (CLU). CLU generalizes the logic of equality with uninterpreted functions (EUF) with constrained lambda expressions, ordering, and successor and predecessor functions. In addition to mod ..."
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Cited by 142 (43 self)
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In this paper, we present the logic of Counter arithmetic with Lambda expressions and Uninterpreted functions (CLU). CLU generalizes the logic of equality with uninterpreted functions (EUF) with constrained lambda expressions, ordering, and successor and predecessor functions. In addition to modeling pipelined processors that EUF has proved useful for, CLU can be used to model many infinitestate systems including those with infinite memories, finite and infinite queues including lossy channels, and networks of identical processes. Even with this richer expressive power, the validity of a CLU formula can be efficiently decided by translating it to a propositional formula, and then using Boolean methods to check validity. We give theoretical and empirical evidence for the efficiency of our decision procedure. We also describe verification techniques that we have used on a variety of systems, including an outoforder execution unit and the loadstore unit of an industrial microprocessor.
Processor verification using efficient reductions of the logic of uninterpreted functions to propositional logic
 ACM Transactions on Computational Logic
, 1999
"... The logic of equality with uninterpreted functions (EUF) provides a means of abstracting the manipulation of data by a processor when verifying the correctness of its control logic. By reducing formulas in this logic to propositional formulas, we can apply Boolean methods such as Ordered Binary Deci ..."
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Cited by 90 (24 self)
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The logic of equality with uninterpreted functions (EUF) provides a means of abstracting the manipulation of data by a processor when verifying the correctness of its control logic. By reducing formulas in this logic to propositional formulas, we can apply Boolean methods such as Ordered Binary Decision Diagrams (BDDs) and Boolean satisfiability checkers to perform the verification. We can exploit characteristics of the formulas describing the verification conditions to greatly simplify the propositional formulas generated. We identify a class of terms we call "pterms" for which equality comparisons can only be used in monotonically positive formulas. By applying suitable abstractions to the hardware model, we can express the functionality of data values and instruction addresses flowing through an instruction pipeline with pterms. A decision procedure can exploit the restricted uses of pterms by considering only "maximally diverse" interpretations of the associated function symbols...
On Solving Presburger and Linear Arithmetic with SAT
 In Proc. of Formal Methods in ComputerAided Design (FMCAD 2002), LNCS
, 2002
"... We show a reduction to propositional logic from quantifierfree Presburger arithmetic, and disjunctive linear arithmetic, based on FourierMotzkin elimination. While the complexity of this procedure is not better than competing techniques, it has practical advantages in solving verification problems ..."
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Cited by 26 (2 self)
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We show a reduction to propositional logic from quantifierfree Presburger arithmetic, and disjunctive linear arithmetic, based on FourierMotzkin elimination. While the complexity of this procedure is not better than competing techniques, it has practical advantages in solving verification problems. It also promotes the option of deciding a combination of theories by reducing them to this logic.
An Efficient Decision Procedure for the Logic of Counter Arithmetic, Constrained Lambda Expressions, Equality and Ordering with Uninterpreted Functions (CLUF)
, 2001
"... Verifiers for infinitestate systems must trade off between the expressiveness of modeling formalism and the efficiency and automation of the tool. Efficient methods have been devised for specific classes of systems, such as superscalar processors and systems with arbitrary size queues. However, to ..."
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Cited by 4 (1 self)
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Verifiers for infinitestate systems must trade off between the expressiveness of modeling formalism and the efficiency and automation of the tool. Efficient methods have been devised for specific classes of systems, such as superscalar processors and systems with arbitrary size queues. However, to model systems that are combinations of these classes, no one method works well enough. In this thesis, we present CLUF...