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SIMON – A simulator for singleelectron tunnel devices and circuits
 IEEE Trans. ComputerAided Design
, 1997
"... Abstract—SIMON is a singleelectron tunnel device and circuit simulator that is based on a Monte Carlo method. It allows transient and stationary simulation of arbitrary circuits consisting of tunnel junctions, capacitors, and voltage sources of three kinds: constant, piecewise linearly time depend ..."
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Abstract—SIMON is a singleelectron tunnel device and circuit simulator that is based on a Monte Carlo method. It allows transient and stationary simulation of arbitrary circuits consisting of tunnel junctions, capacitors, and voltage sources of three kinds: constant, piecewise linearly time dependent, and voltage controlled. Cotunneling can be simulated either with a plain Monte Carlo method or with a combination of the Monte Carlo and master equation approach. A graphic user interface allows the quick and easy design of circuits with singleelectron tunnel devices. Furthermore, as an example of the usage of SIMON, we discuss the essential problem of random background charge and present possible solutions. Index Terms—Cotunneling, Coulomb blockade, master equation, Monte Carlo technique, random background charge, single electron, tunneling.
On Computing Addition Related Arithmetic Operations via Controlled Transport Of Charge
 IEEE TRANSACTIONS OF COMPUTERS
, 2005
"... In this paper we investigate the implementation of basic arithmetic functions, such as addition and multiplication, in Single Electron Tunneling (SET) technology. First, we describe the SET equivalent of two conventional design styles, namely the equivalents of Boolean CMOS and threshold logic gates ..."
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Cited by 20 (12 self)
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In this paper we investigate the implementation of basic arithmetic functions, such as addition and multiplication, in Single Electron Tunneling (SET) technology. First, we describe the SET equivalent of two conventional design styles, namely the equivalents of Boolean CMOS and threshold logic gates. Second, we propose a set of building blocks, which can be utilized for a novel design style, namely arithmetic operations performed by direct manipulation of the location of individual electrons within the system. Using this new set of building blocks, we propose several novel approaches for computing addition related arithmetic operations via the controlled transport of charge (individual electrons). In particular, we prove the following: nbit addition can be implemented with a depth2 network built with O(n) circuit elements; ninput parity can be computed with a depth2 network constructed with O(n) circuit elements and the same applies for nj log n counters; multiple operand addition of m nbit operands can be implemented with a depth2 network using O(mn) circuit elements; and finally nbit multiplication can be implemented with a depth3 network built with O(n) circuit elements.
Overview of Nanoelectronic Devices
 Proceedings of the IEEE
, 1997
"... This paper provides an overview of research developments toward nanometerscale electronic switching devices for use in building ultradensely integrated electronic computers. Specifically, two classes of alternatives to the fieldeffect transistor are considered: 1) quantumeffect and singleelectr ..."
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Cited by 17 (1 self)
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This paper provides an overview of research developments toward nanometerscale electronic switching devices for use in building ultradensely integrated electronic computers. Specifically, two classes of alternatives to the fieldeffect transistor are considered: 1) quantumeffect and singleelectron solidstate devices and 2) molecular electronic devices. A taxonomy of devices in each class is provided, operational principles are described and compared for the various types of devices, and the literature about each is surveyed. This information is presented in nonmathematical terms intended for a general, technically interested readership
Aspects of Systems and Circuits for Nanoelectronics
 PROCEEDINGS OF THE IEEE
, 1997
"... This paper analyzes the effect of this technological progress on the design of nanoelectronic circuits and describes computational paradigms revealing novel features such as distributed storage, fault tolerance, selforganization, and local processing. In particular, linear threshold networks, the a ..."
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Cited by 10 (4 self)
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This paper analyzes the effect of this technological progress on the design of nanoelectronic circuits and describes computational paradigms revealing novel features such as distributed storage, fault tolerance, selforganization, and local processing. In particular, linear threshold networks, the associative matrix, selforganizing feature maps, and cellular arrays are investigated from the viewpoint of their potential significance for nanoelectronics. Although these concepts have already been implemented using present technologies, the intention of this paper is to give an impression of their usefulness to system implementations with quantumeffect devices.
QuantumEffect and SingleElectron Devices
, 2003
"... In this paper, we review the current status of nanoelectronic devices based on quantum effects such as quantization of motion and interference, and those based on single electron charging phenomena in ultrasmall structures. In the first part, we discuss wavebehavior in quantum semiconductor structu ..."
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Cited by 6 (0 self)
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In this paper, we review the current status of nanoelectronic devices based on quantum effects such as quantization of motion and interference, and those based on single electron charging phenomena in ultrasmall structures. In the first part, we discuss wavebehavior in quantum semiconductor structures, and several device structures based on quantum waveguide behavior such as stub tuners, Ybranches, and quantum ratchets. Discussion is also given of proposals for use of interference phenomena in quantum computing followed by the issue of quantum decoherence which ultimately limits utilization of quantum effects. In the second part, we discuss single electron effects such as Coulomb blockade, and associated devices such as the single electron transistor and single electron charge pumps. This is followed by an overview of some recent work focusing on Si based single electron structures. We conclude with a discussion of proposals and realizations for singleelectron circuits and architectures including single electron memories, single electron logic, and single electron cellular nonlinear networks.
Numerical Study of SingleElectron Effects in Systems of Small Tunnel Junctions
, 1996
"... We describe a new and efficient method for the numerical study of the dynamics and statistics of singleelectron systems presenting arbitrary combinations of small tunnel junctions, capacitances, and voltage sources. The method is based on numerical solution of a linear matrix equation for the vec ..."
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Cited by 1 (0 self)
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We describe a new and efficient method for the numerical study of the dynamics and statistics of singleelectron systems presenting arbitrary combinations of small tunnel junctions, capacitances, and voltage sources. The method is based on numerical solution of a linear matrix equation for the vector of probabilities of the most important electric charge states of the system, with iterative account of new states. The method is able to describe very small deviations from the ideal behavior of a system, due to finite speed of applied signals, thermal activation, and macroscopic quantum tunneling of charge (cotunneling). The code is portable accross a number of UNIX based platforms, including the Intel ipsc/860 and Paragon parallel comp...
Temperature
, 2005
"... dependence of the locked mode in a singleelectron latch ..."
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dependence of the locked mode in a singleelectron latch
ON EFFECTIVE COMPUTATION WITH NANODEVICES: A SINGLE ELECTRON TUNNELLING TECHNOLOGY CASE STUDY
"... It is generally accepted that fundamental physical limitations will eventually inhibit further (C)MOS feature size reduction. Several emerging nanoelectronic technologies with greater scaling potential, such as Single Electron Tunneling (SET), are currently under investigation. Each of these exhibi ..."
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It is generally accepted that fundamental physical limitations will eventually inhibit further (C)MOS feature size reduction. Several emerging nanoelectronic technologies with greater scaling potential, such as Single Electron Tunneling (SET), are currently under investigation. Each of these exhibit their own switching behavior, resulting in new paradigms for logic design and computation. This paper presents a case study on SET based logic. We analyze and compare three different SET designs styles as follows. First, SET transistor based designs that mimic conventional CMOS. Second, single electron threshold logic based on the voltage threshold of SET tunnel junctions. Third, electron counting logic based on direct encoding of integers as charge combined with computation via charge transport.
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Some Outlines of Circuit Applications for a SingleElectron 2Island Subcircuit
, 2001
"... To benefit from the reduction of the devices ' feature sizes new circuit concepts can be introduced. These new circuits will require new devices, such as singleelectronic devices. Singleelectronics devices are capable of controlling the transport of only one electron. In this manner, the charg ..."
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To benefit from the reduction of the devices ' feature sizes new circuit concepts can be introduced. These new circuits will require new devices, such as singleelectronic devices. Singleelectronics devices are capable of controlling the transport of only one electron. In this manner, the charge transfer through the device is quantized. However, singleelectronics is still a highly experimental technology. As an example of singleelectronics we discuss circuits based on the socalled singleelectron tunneling (SET) device, including tunnel junctions.