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Optimal Carry Save Networks
"... A general theory is developed for constructing the asymptotically shallowest networks and the asymptotically smallest networks (with respect to formula size) for the carry save addition of n numbers using any given basic carry save adder as a building block. Using these optimal carry save additi ..."
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A general theory is developed for constructing the asymptotically shallowest networks and the asymptotically smallest networks (with respect to formula size) for the carry save addition of n numbers using any given basic carry save adder as a building block. Using these optimal carry save addition networks the shallowest known multiplication circuits and the shortest formulae for the majority function (and many other symmetric Boolean functions) are obtained. In this paper, simple basic carry save adders are described, using which multiplication circuits of depth 3:71 log n (the result of which is given as the sum of two numbers) and majority formulae of size O(n 3:21 ) are constructed. Using more complicated basic carry save adders, not described here, these results could be further improved. Our best bounds are currently 3:57 log n for depth and O(n 3:13 ) for formula size. 1. Introduction The question `How fast can we multiply?' is one of the fundamental questions...
The Size and Depth of Layered Boolean Circuits
"... Abstract. We consider the relationship between size and depth for layered Boolean circuits, synchronous circuits and planar circuits as well as classes of circuits with small separators. In particular, we show that every layered Boolean circuit of size s can be simulated by a layered Boolean circuit ..."
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Abstract. We consider the relationship between size and depth for layered Boolean circuits, synchronous circuits and planar circuits as well as classes of circuits with small separators. In particular, we show that every layered Boolean circuit of size s can be simulated by a layered Boolean circuit of depth O ( √ s log s). For planar circuits and synchronous circuits of size s, we obtain simulations of depth O ( √ s). The best known result so far was by Paterson and Valiant [16], and Dymond and Tompa [6], which holds for general Boolean circuits and states that D(f) = O(C(f) / log C(f)), where C(f) and D(f) are the minimum size and depth, respectively, of Boolean circuits computing f. The proof of our main result uses an adaptive strategy based on the twoperson pebble game introduced by Dymond and Tompa [6]. Improving any of our results by polylog factors would immediately improve the bounds for general circuits. Key words: Boolean circuits, circuit size, circuit depth, pebble games 1
Relationless completeness and separations
"... Abstract—This paper extends Valiant’s work on VP and VNP to the settings in which variables are not multiplicatively commutative and/or associative. Our main result is a theory of completeness for these algebraic worlds. We define analogs of Valiant’s classes VP and VNP, as well as of the polynomial ..."
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Abstract—This paper extends Valiant’s work on VP and VNP to the settings in which variables are not multiplicatively commutative and/or associative. Our main result is a theory of completeness for these algebraic worlds. We define analogs of Valiant’s classes VP and VNP, as well as of the polynomials permanent and determinant, in these worlds. We then prove that even in a completely relationless world which assumes no commutativity nor associativity, permanent remains VNPcomplete, and determinant can polynomially simulate any arithmetic formula, just as in the standard commutative, associative world of Valiant. In the absence of associativity, the completeness proof gives rise to the following combinatorial problem: what is the smallest binary tree which contains as minors all binary trees with n leaves. We give an explicit construction of such a universal tree of polynomial size, a result of possibly independent interest. Given that such nontrivial reductions are possible even without commutativity and associativity, we turn to lower bounds. In the nonassociative, commutative world we prove exponential circuit lower bounds on explicit polynomials, separating the nonassociative commutative analogs of VP and VNP. Obtaining such lower bounds and a separation in the complementary associative, noncommutative world has been open for about 30 years. KeywordsAlgebraic complexity. Completeness. Separations. I.
Lower bounds using Kolmogorov complexity
 In Proceedings of CiE’06
, 2006
"... Abstract. In this paper, we survey a few recent applications of Kolmogorov complexity to lower bounds in several models of computation. We consider KI complexity of Boolean functions, which gives the complexity of finding a bit where inputs differ, for pairs of inputs that map to different function ..."
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Abstract. In this paper, we survey a few recent applications of Kolmogorov complexity to lower bounds in several models of computation. We consider KI complexity of Boolean functions, which gives the complexity of finding a bit where inputs differ, for pairs of inputs that map to different function values. This measure and variants thereof were shown to imply lower bounds for quantum and randomized decision tree complexity (or query complexity) [LM04]. We give a similar result for deterministic decision trees as well. It was later shown in [LLS05] that KI complexity gives lower bounds for circuit depth. We review those results here, emphasizing simple proofs using Kolmogorov complexity, instead of strongest possible lower bounds. We also present a Kolmogorov complexity alternative to Yao’s minmax principle [LL04]. As an example, this is applied to randomized oneway communication complexity.
Propositional proof complexity — an introduction
 In Ulrich Berger and Helmut Schwichtenberg, editors, Computational Proof Theory
, 1997
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Are There Hard Examples for Frege Proof Systems?
, 1995
"... It is generally conjectured that there is an exponential separation between Frege and extended Frege systems. This paper reviews and introduces some candidates for families of combinatoriM tautologies for which Frege proofs might need to be superpolynomially longer than extended Frege proofs. Surpri ..."
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It is generally conjectured that there is an exponential separation between Frege and extended Frege systems. This paper reviews and introduces some candidates for families of combinatoriM tautologies for which Frege proofs might need to be superpolynomially longer than extended Frege proofs. Surprisingly, we conclude that no particularly good or convincing examples are known. The examples of combinatorial tautologies that we consider seem to give at most a quasipolynomial speedup of extended Frege proofs over Frege proofs, with the sole possible exception of tautologies based on a theorem of Frankl.
A Generalization of Spira’s Theorem and Circuits with Small Segregators or Separators
"... Abstract. Spira [28] showed that any Boolean formula of size s can be simulated in depth O(log s). We generalize Spira’s theorem and show that any Boolean circuit of size s with segregators of size f(s) can be simulated in depth O(f(s) log s). If the segregator size is at least s ε for some constant ..."
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Abstract. Spira [28] showed that any Boolean formula of size s can be simulated in depth O(log s). We generalize Spira’s theorem and show that any Boolean circuit of size s with segregators of size f(s) can be simulated in depth O(f(s) log s). If the segregator size is at least s ε for some constant ε> 0, then we can obtain a simulation of depth O(f(s)). This improves and generalizes a simulation of polynomialsize Boolean circuits of constant treewidth k in depth O(k 2 log n) by Jansen and Sarma [17]. Since the existence of small balanced separators in a directed acyclic graph implies that the graph also has small segregators, our results also apply to circuits with small separators. Our results imply that the class of languages computed by nonuniform families of polynomialsize circuits that have constant size segregators equals nonuniform NC 1. Considering space bounded Turing machines to generate the circuits, for f(s) log 2 sspace uniform families of Boolean circuits our smalldepth simulations are also f(s) log 2 sspace uniform. As a corollary, we show that the Boolean Circuit Value problem for circuits with constant size segregators (or separators) is in deterministic SP ACE(log 2 n). Our results also imply that the Planar Circuit Value problem, which is known to be PComplete [16], can be solved in deterministic SP ACE ( √ n log n). Key words: Boolean circuits, circuit size, circuit depth, Spira’s theorem, Turing machines, space complexity 1
Uniform proof complexity
, 2005
"... We define the notion of the uniform reduct of a propositional proof system as the set of those bounded formulas in the language of Peano Arithmetic which have polynomial size proofs under the ParisWilkietranslation. With respect to the arithmetic complexity of uniformhard and obviously reducts, we ..."
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We define the notion of the uniform reduct of a propositional proof system as the set of those bounded formulas in the language of Peano Arithmetic which have polynomial size proofs under the ParisWilkietranslation. With respect to the arithmetic complexity of uniformhard and obviously reducts, we show that uniform reducts are Π0 1 in Σ0 2. We also show under certain regularity conditions that each uniform reduct is closed under bounded generalisation; that in the case the language includes a symbol for exponentiation, a uniform reduct is closed under modus ponens if and only if it already contains all true bounded formulas; and that each uniform reduct contains all true Πb 1 (α)formulas.
Boolean Circuits
, 2000
"... h that any g i is either one of the projections x 1 ; : : : ; xn or it equals to h(g j1 ; : : : ; g jr ), for some h 2\Omega and j 1 ; : : : ; j r ! i. Drawing directed edges from all such j 1 ; : : : ; j r to i, and labelling i by h, defines a labelled directed acyclic graph. The size of the circ ..."
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h that any g i is either one of the projections x 1 ; : : : ; xn or it equals to h(g j1 ; : : : ; g jr ), for some h 2\Omega and j 1 ; : : : ; j r ! i. Drawing directed edges from all such j 1 ; : : : ; j r to i, and labelling i by h, defines a labelled directed acyclic graph. The size of the circuit is k. The maximum length of a path from a vertex corresponding to one of the inputs x 1 ; : : : ; xn to g k is the depth of the circuit. Note that formulas are circuits whose graphs are trees. There are three basic ways to measure complexity of a Boolean function, given a basis\Omega\Gamma the minimum size L\Omega