Evolvable hardware (EHW) has attracted increasing attention since early 1990's with the advent of easily reconfigurable hardware such as field programmable gate arrays (FPGAs). It promises to provide an entirely new approach to complex electronic circuit design and new adaptive hardware. EHW has been demonstrated to be able to perform a wide range of tasks from pattern recognition to adaptive control. However, there are still many fundamental issues in EHW which remain open. This paper reviews the current status of EHW, discusses the promises and possible advantages of EHW, and indicates the challenges we must meet in order to develop practical and large-scale EHW. 1 Introduction Evolvable hardware (EHW) refers to hardware that can change its architecture and behaviour dynamically and autonomously by interacting with its environment. At present, almost all EHW uses an evolutionary algorithm (EA) as their main adaptive mechanism. One of the key motivations behind EHW is to learn from N...

Evolvable Hardware (EHW) has been proposed as a new technique to design complex systems. Often, complex systems turn out to be very difficult to evolve. The problem is that a general strategy is too difficult for the evolution process to discover directly. This paper proposes a new approach that performs incremental evolution in two directions: from complex system to sub-systems and from subsystems back to complex system. In this approach, incremental evolution gradually decomposes a complex problem into some sub-tasks. In a second step, we gradually make the tasks more challenging and general. Our approach automatically discovers the sub-tasks, their sequence as well as circuit layout dimensions. Our method is tested in a digital circuit domain and compared to direct evolution. We show that our bidirectional incremental approach can handle more complex, harder tasks and evolve them more effectively, then direct evolution. 1. Introduction Evolvable Hardware (EHW) has been introduced ...

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of the work presented in this thesis has been previously published as listed below. Although some of these papers have co-authors, the work appearing in this thesis is entirely my own, with the exception of parts of chapter 3, which presents work jointly carried out by myself and Adrian Thompson. The respective contributions to this work will be explicitly stated at the beginning of the chapter. List of Previous Publications Kuntz, P., Layzell, P., & Snyers, D. (1997). A Colony of Ant-like Agents for Partitioning

. The long term goal of the work described in this paper is the development of a bio-inspired system, employing evolvable hardware, that adapts according to the needs of the environment in whichitisdeployed. The application described here is the design of a novel and highly parallel image processing tool to detect edges within a wide range of conventional grey-scale images. We discuss the simulation of such a system based on a genetic programming paradigm, using a simple binary logic tree to implement the genetic string coding. The results acquired from the simulation are compared with those obtained from the application of a conventional Sobel edge detector, and although rudimentary,show the great potential of such bio-inspired systems. 1 Introduction Bio-inspired systems have been present in the electronics and computer science communities for manyyears [21]. It is possible to classify bio-inspired systems into three domains: phylogeny,ontogenyandepigenesis. Eachofthese i...

While genetic programming is in theory a generally applicable method for machine learning of algorithms, it is currently impractical for certain problem domains due to its computational requirements. We are developing the EvolvaWare system to utilize the computational speedups provided by reconfigurable hardware to speed the learning process. Additionally, the hardware-based implementations produced by EvolvaWare will speed execution of algorithms

Abstract. Evolvable Hardware (EHW) is a scheme- inspired by natural evolution, for automatic design of hardware systems. By exploring a large design search space, EHW may find solutions for a task, unsolvable, or more optimal than those found using traditional design methods. During evolution it is necessary to evaluate a large number of different circuits which is normally most efficiently undertaken in reconfigurable hardware. For digital design, FPGAs (Field Programmable Gate Arrays) are very applicable. Thus, this technology is applied in much of the work with evolvable hardware. The paper introduces EHW and outlines how it can be applied for hardware design of real-world applications. It continues by discussing the main problems and possible solutions. This includes improving the scalability of evolved systems. Promising features of EHW will be addressed as well, including run-time adaptable systems. 1

Abstract. An evolvable hardware (EHW) system for high-speed sonar return classification has been proposed. The system demonstrates an average accuracy of 91.4 % on a sonar spectrum data set. This is better than a feed-forward neural network and previously proposed EHW architectures. Furthermore, this system is designed for online evolution. Incremental evolution, data buses and high level modules have been utilized in order to make the evolution of the 480 bit-input classifier feasible. The classification has been implemented for a Xilinx XC2VP30 FPGA with a resource utilization of 81 % and a classification time of 0.5µs. 1

Evolvable Hardware (EHW) has been proposed as a new method for evolving circuits automatically. One of the problems appearing is that only circuits of limited size are evolvable. In this paper it is shown that by applying an approach where the training set as well as each training vector is partitioned, large combinational circuits can be evolved. By applying the proposed scheme, it is shown that it is possible to evolve multiplier circuits larger then those evolved earlier.

In this paper, we examine the results of major previous attempts to apply genetic and evolutionary computation (GEC) to image processing. In many problems, the accuracy (quality) of solutions obtained by GEC-based methods is better than that obtained by other methods such as conventional methods, neural networks and simulated annealing. However, the computation time required is satisfactory in some problems, whereas it is unsatisfactory in other problems. We consider the current problems of GEC-based methods and present the following measures to achieve still better performance: (1) utilizing competent GECs, (2) incorporating other search algorithms such as local hill climbing algorithms, (3) hybridizing with conventional image processing algorithms, (4) modeling the given problem with as smaller parameters as possible, and (5) using parallel processors to evaluate the fitness function. 1.