Summary. Starting from a broad description of analog circuit design in terms of topology design and sizing, we discuss the difficulties of sizing and describe approaches that are manual or automatic. These approaches make use of blackbox optimization techniques such as evolutionary algorithms or convex optimization techniques such as geometric programming. Geometric programming requires posynomial expressions for a circuit’s performance measurements. We show how a genetic algorithm can be exploited to evolve a posynomial expression (i.e. model) of transistor (i.e. mosfet) behavior more accurately than statistical techniques in the literature. 1

The use of CMOS nanometer technologies at 65 nm and below will pose serious challenges on the design of mixed-signal integrated systems in the very near future. Rising design complexities, tightening time-to-market constraints, leakage power, increasing technology tolerances, and reducing supply voltages are key challenges that designers face. Novel types of devices, new process materials and new reliability issues are next on the horizon. We discuss new design methodologies and EDA tools that are being or need to be developed to address the problems of designing such mixed-signal integrated systems.

Behavioral-level performance modeling of analog and mixed-signal systems using support vector machines This paper presents a novel behavioral-level analog and mixedsignal (AMS) system performance modeling methodology using support vector machines (SVM). The method relies on linearly graded sub-spaces to model complex multi-dimensional performance spaces. A detailed evaluation of the method has been carried out for the purpose of potential use for AMS synthesis. The method has been applied to a complex nonideal 2 nd order Sigma-Delta modulator (SDM) and results show good accuracy of performance modeling and numerical efficiency. 1.

analog circuit synthesis. It usually consist of two steps: feasibility design space identification and performance macromodels generation. A feasibility design space is defined as a multidimensional space in which every design satisfies all the design constraints. The minimum set of constraints is the one that ensures the correct functionality of the given circuit topology. Performance macromodels are only constructed and thereby valid in the functionally correct design space. Support vector machines (SVMs) are used as classifier to identify the feasible design space of analog circuits. A kernel is an integral part of the SVM and contributes in obtaining an optimized and accurate classifier. The most commonly used kernels are Radial Basis Function (RBF), polynomial, spline, multilayer perceptron. In this paper, some new kernels and some other kernels composed through modifications on the some of the standard kernels, are explored. The classifiers using these kernel functions have been tested on different analog circuits in order to identify the feasible design space. HSPICE has been used for generation of learning data. Least Square SVM toolbox interfaced with MATLAB was used for classification. We found that use of modified kernels improves classification accuracy as well as shortens classifier generation time.

Abstract—Long design cycles due to the inability to predict silicon realities are a well-known problem that plagues analog/RF integrated circuit product development. As this problem worsens for nanoscale IC technologies, the high cost of design and multiple manufacturing spins causes fewer products to have the volume required to support full-custom implementation. Design reuse and analog synthesis make analog/RF design more affordable; however, the increasing process variability and lack of modeling accuracy remain extremely challenging for nanoscale analog/RF design. We propose a regular analog/RF IC using metal-mask configurability design methodology Optimization with Recourse of Analog Circuits including Layout Extraction (ORACLE), which is a combination of reuse and shared-use by formulating the synthesis problem as an optimization with recourse problem. Using a two-stage geometric programming with recourse approach, ORACLE solves for both the globally optimal shared and application-specific variables. Furthermore, robust optimization is proposed to treat the design with variability problem, further enhancing the ORACLE methodology by providing yield bound for each configuration of regular designs. The statistical variations of the process parameters are captured by a confidence ellipsoid. We demonstrate ORACLE for regular Low Noise Amplifier designs using metal-mask configurability, where a range of applications share common underlying structure and application-specific customization is performed using the metal-mask layers. Two RF oscillator design examples are shown to achieve robust designs with guaranteed yield bound. Index Terms—Configurable design, optimization with recourse, robustness, statistical optimization. I.

Design tool solutions for mixed-signal/RF circuit design