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27
Information Distance
, 1997
"... While Kolmogorov complexity is the accepted absolute measure of information content in an individual finite object, a similarly absolute notion is needed for the information distance between two individual objects, for example, two pictures. We give several natural definitions of a universal inf ..."
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Cited by 36 (4 self)
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While Kolmogorov complexity is the accepted absolute measure of information content in an individual finite object, a similarly absolute notion is needed for the information distance between two individual objects, for example, two pictures. We give several natural definitions of a universal information metric, based on length of shortest programs for either ordinary computations or reversible (dissipationless) computations. It turns out that these definitions are equivalent up to an additive logarithmic term. We show that the information distance is a universal cognitive similarity distance. We investigate the maximal correlation of the shortest programs involved, the maximal uncorrelation of programs (a generalization of the SlepianWolf theorem of classical information theory), and the density properties of the discrete metric spaces induced by the information distances. A related distance measures the amount of nonreversibility of a computation. Using the physical theo...
Logic Synthesis of Reversible Wave Cascades
, 2002
"... A circuit is reversible if it maps each input vector into a unique output vector, and vice versa. Reversible circuits lead to powerefficient CMOS implementations. Reversible logic synthesis may be applicable to optical and quantum computing. Minimizing garbage bits is the main challenge in reversib ..."
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Cited by 27 (6 self)
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A circuit is reversible if it maps each input vector into a unique output vector, and vice versa. Reversible circuits lead to powerefficient CMOS implementations. Reversible logic synthesis may be applicable to optical and quantum computing. Minimizing garbage bits is the main challenge in reversible logic synthesis.
Optimal synthesis of multiple output Boolean functions using a set of quantum gates by symbolic reachability analysis
 IEEE Trans. on CAD of Integrated Circuits and Systems
, 2006
"... Abstract—This paper proposes an approach to optimally synthesize quantum circuits by symbolic reachability analysis, where the primary inputs and outputs are basis binary and the internal signals can be nonbinary in a multiplevalued domain. The authors present an optimal synthesis method to minimiz ..."
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Cited by 17 (3 self)
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Abstract—This paper proposes an approach to optimally synthesize quantum circuits by symbolic reachability analysis, where the primary inputs and outputs are basis binary and the internal signals can be nonbinary in a multiplevalued domain. The authors present an optimal synthesis method to minimize quantum cost and some speedup methods with nonoptimal quantum cost. The methods here are applicable to small reversible functions. Unlike previous works that use permutative reversible gates, a lower level library that includes nonpermutative quantum gates is used here. The proposed approach obtains the minimum cost quantum circuits for Miller gate, half adder, and full adder, which are better than previous results. This cost is minimum for any circuit using the set of quantum gates in this paper, where the control qubit of 2qubit gates is always basis binary. In addition, the minimum quantum cost in the same manner for Fredkin, Peres, and Toffoli gates is proven. The method can also find the best conversion from an irreversible function to a reversible circuit as a byproduct of the generality of its formulation, thus synthesizing in principle arbitrary multioutput Boolean functions with quantum gate library. This paper constitutes the first successful experience of applying formal methods and satisfiability to quantum logic synthesis. Index Terms—Formal verification, logic synthesis, model checking, quantum computing, reversible logic, satisfiability. I.
Reversible Cascades With Minimal Garbage
, 2004
"... The problem of minimizing the number of garbage outputs is an important issue in reversible logic design. We start with the analysis of the number of garbage outputs that must be added to a multiple output function to make it reversible. We give a precise formula for the theoretical minimum of the ..."
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Cited by 17 (7 self)
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The problem of minimizing the number of garbage outputs is an important issue in reversible logic design. We start with the analysis of the number of garbage outputs that must be added to a multiple output function to make it reversible. We give a precise formula for the theoretical minimum of the required number of garbage outputs. For some benchmark functions, we calculate the garbage required by some proposed reversible design methods and compare it to the theoretical minimum. Based on the information about minimal garbage, we suggest a new reversible design method that uses the minimum number of garbage outputs. We show that any Boolean function can be realized as a reversible network in terms of this new approach by giving the theoretical method of finding such a network. Using a heuristics synthesis approach, we create a program and run it to compare results of our synthesis to the previously reported synthesis results for the benchmark functions with up to ten variables. Finally, we show that the synthesis for the proposed model can be accomplished with lower cost than the synthesis of EXOR programmable logic arrays.
Toffoli network synthesis with templates
 IEEE Trans. on CAD of Integrated Circuits and Systems
, 2005
"... Abstract—Reversible logic functions can be realized as networks of Toffoli gates. The synthesis of Toffoli networks can be divided into two steps. First, find a network that realizes the desired function. Second, transform the network such that it uses fewer gates, while realizing the same function. ..."
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Cited by 14 (6 self)
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Abstract—Reversible logic functions can be realized as networks of Toffoli gates. The synthesis of Toffoli networks can be divided into two steps. First, find a network that realizes the desired function. Second, transform the network such that it uses fewer gates, while realizing the same function. This paper addresses the above synthesis approach. We present a basic method and, based on that, a bidirectional synthesis algorithm which produces a network of Toffoli gates realizing a given reversible specification. An asymptotically optimal modification of the basic synthesis algorithm employing generalized mEXOR gates is also presented. Transformations are then applied using template matching. The basis for a template is a network of gates that realizes the identity function. If a sequence of gates in the synthesized network matches a sequence comprised of more than half the gates in a template, then a transformation using the remaining gates in the template can be applied resulting in a reduction in the gate count for the synthesized network. All templates with up to six gates are described in this paper. Experimental results including an exhaustive examination of all 3variable reversible functions and a collection of benchmark problems are presented. The paper concludes with suggestions for further research. Index Terms—Logic synthesis, quantum computing, reversible logic. I.
Overview of Nanoelectronic Devices
 Proceedings of the IEEE
, 1997
"... This paper provides an overview of research developments toward nanometerscale electronic switching devices for use in building ultradensely integrated electronic computers. Specifically, two classes of alternatives to the fieldeffect transistor are considered: 1) quantumeffect and singleelectr ..."
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Cited by 11 (1 self)
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This paper provides an overview of research developments toward nanometerscale electronic switching devices for use in building ultradensely integrated electronic computers. Specifically, two classes of alternatives to the fieldeffect transistor are considered: 1) quantumeffect and singleelectron solidstate devices and 2) molecular electronic devices. A taxonomy of devices in each class is provided, operational principles are described and compared for the various types of devices, and the literature about each is surveyed. This information is presented in nonmathematical terms intended for a general, technically interested readership
A computationuniversal twodimensional 8state triangular reversible cellular automaton
 Proc. of the Second Colloquium on Universal Machines and Computations, Volume II
, 1998
"... A reversible cellular automaton (RCA) is a cellular automaton (CA) whose global function is injective and every con guration has at most one predecessor. Margolus showed that there is a computationuniversal twodimensional 2state RCA. But his RCA has nonuniform neighbor, so Morita and Ueno propose ..."
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Cited by 11 (5 self)
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A reversible cellular automaton (RCA) is a cellular automaton (CA) whose global function is injective and every con guration has at most one predecessor. Margolus showed that there is a computationuniversal twodimensional 2state RCA. But his RCA has nonuniform neighbor, so Morita and Ueno proposed 16state computationuniversal RCA using partitioned cellular automata (PCA). Because PCA can be regarded as a subclass of standard CA, their models has standard neighbor. In this paper, we show that the number of states of Morita and Ueno's models can be reducible. To decrease the number of states from their models with preserving isotropic and bitpreserving properties, we usedtriangular 3neighbor, and thus 8state RCA can be possible. This is the smallest state twodimensional RCA under the condition of isotropic property on the framework of PCA. We show that our model can simulate basic circuit elements such as unit wires, delay elements, crossing wires, switch gates and inverse switch gates. And it is possible to construct a Fredkin gate by combining these elements. Since Fredkin gate is known to be a universal logic gate, our model has computationuniversality.
Aspects of Systems and Circuits for Nanoelectronics
 PROCEEDINGS OF THE IEEE
, 1997
"... This paper analyzes the effect of this technological progress on the design of nanoelectronic circuits and describes computational paradigms revealing novel features such as distributed storage, fault tolerance, selforganization, and local processing. In particular, linear threshold networks, the a ..."
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Cited by 10 (4 self)
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This paper analyzes the effect of this technological progress on the design of nanoelectronic circuits and describes computational paradigms revealing novel features such as distributed storage, fault tolerance, selforganization, and local processing. In particular, linear threshold networks, the associative matrix, selforganizing feature maps, and cellular arrays are investigated from the viewpoint of their potential significance for nanoelectronics. Although these concepts have already been implemented using present technologies, the intention of this paper is to give an impression of their usefulness to system implementations with quantumeffect devices.
Synthesis of Fredkin–Toffoli Reversible Networks
 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
, 2005
"... Reversible logic has applications in quantum computing, low
power CMOS, nanotechnology, optical computing, and DNA computing.
The most common reversible gates are the Toffoli gate and the Fredkin gate.
We present a method that synthesizes a network with these gates in two steps. First, our synthesis ..."
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Cited by 6 (0 self)
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Reversible logic has applications in quantum computing, low
power CMOS, nanotechnology, optical computing, and DNA computing.
The most common reversible gates are the Toffoli gate and the Fredkin gate.
We present a method that synthesizes a network with these gates in two steps. First, our synthesis algorithm finds a cascade of Toffoli and Fredkin gates with no backtracking and minimal lookahead. Next we apply transformations that reduce the number of gates in the network. Transformations
are accomplished via template matching. The basis for a template is a network with gates that realizes the identity function. If a sequence of gates in the network to be reduced matches a sequence of gates comprising more than half of a template, then a transformation that reduces the gate count can be applied.We have synthesized all three input, three output reversible functions and here compare our results to the optimal results. We also present the results of applying our synthesis tool to obtain networks
for a number of benchmark functions.
Unreliable and ResourceConstrained Decoding
, 2010
"... Traditional information theory and communication theory assume that decoders are noiseless and operate without transient or permanent faults. Decoders are also traditionally assumed to be unconstrained in physical resources like materiel, memory, and energy. This thesis studies how constraining reli ..."
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Cited by 3 (3 self)
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Traditional information theory and communication theory assume that decoders are noiseless and operate without transient or permanent faults. Decoders are also traditionally assumed to be unconstrained in physical resources like materiel, memory, and energy. This thesis studies how constraining reliability and resources in the decoder limits the performance of communication systems. Five communication problems are investigated. Broadly speaking these are communication using decoders that are wiring costlimited, that are memorylimited, that are noisy, that fail catastrophically,