The introduction of simulation-based analog synthesis tools creates a new challenge for analog modeling. These tools routinely visit 103 to 105 fully simulated circuit solution candidates. What might we do with all this circuit data? We show how to adapt recent ideas from large-scale data mining to build models that capture significant regions of this visited performance space, parametefized by variables manipulated by synthesis, trained by the data points visited during synthesis. Experimental restfits show that we can automatically build useful nonlinear regression models for large analog design spaces.

In this paper we propose a RObust Analog Design tool (ROAD) for post-tuning analog/RF circuits. Starting from an initial design derived from hand analysis or analog circuit synthesis based on simplified models, ROAD extracts accurate posynomial performance models via transistor-level simulation and optimizes the circuit by geometric programming. Importantly, ROAD sets up all design constraints to include large-scale process variations to facilitate the tradeoff between yield and performance. A novel convex formulation of the robust design problem is utilized to improve the optimization efficiency and to produce a solution that is superior to other local tuning methods. In addition, a novel projection-based approach for posynomial fitting is used to facilitate scaling to large problem sizes. A new implicit power iteration algorithm is proposed to find the optimal projection space and extract the posynomial coefficients with robust convergence. The efficacy of ROAD is demonstrated on several circuit examples. 1.

Abstract — The hierarchical graph-based sizing and biasing method of analog circuits has been previously developed. Its potential application in the field of knowledge-based analog synthesis is studied. This method reduces the number of optimization variables by taking into account their circuit dependency relations. This is done by automatically generating a design plan to express circuit dependencies. The design plan is then introduced into an optimization loop. The optimization engine uses the Nelder-Mead simplex method. The whole method is successfully applied to a single-ended two-stage amplifier. It produces simulator-like quality designs in a reasonable time, thus allowing interactive design of analog circuits. I.