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Analysis, Design, and Optimization of Spiral Inductors and Transformers for Si RF IC's
 IEEE J. SolidState Circuits
, 1998
"... Silicon integrated circuit spiral inductors and transformers are analyzed using electromagnetic analysis. With appropriate approximations, the calculations are reduced to electrostatic and magnetostatic calculations. The important effects of substrate loss are included in the analysis. Classic circu ..."
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Cited by 66 (3 self)
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Silicon integrated circuit spiral inductors and transformers are analyzed using electromagnetic analysis. With appropriate approximations, the calculations are reduced to electrostatic and magnetostatic calculations. The important effects of substrate loss are included in the analysis. Classic circuit analysis and network analysis techniques are used to derive twoport parameters from the circuits. From twoport measurements, loworder, frequencyindependent lumped circuits are used to model the physical behavior over a broadfrequency range. The analysis is applied to traditional square and polygon inductors and transformer structures as well as to multilayer metal structures and coupled inductors. A custom computeraideddesign tool called ASITIC is described, which is used for the analysis, design, and optimization of these structures. Measurements taken over a frequency range from 100 MHz to 5 GHz show good agreement with theory.
Physical modeling of spiral inductors on silicon
 IEEE Transactions on Electron Devices
, 2000
"... Abstract—This paper presents a physical model for planar spiral inductors on silicon, which accounts for eddy current effect in the conductor, crossover capacitance between the spiral and centertap, capacitance between the spiral and substrate, substrate ohmic loss, and substrate capacitance. The m ..."
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Cited by 37 (0 self)
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Abstract—This paper presents a physical model for planar spiral inductors on silicon, which accounts for eddy current effect in the conductor, crossover capacitance between the spiral and centertap, capacitance between the spiral and substrate, substrate ohmic loss, and substrate capacitance. The model has been confirmed with measured results of inductors having a wide range of layout and process parameters. This scalable inductor model enables the prediction and optimization of inductor performance. Index Terms—Eddy currents, inductor model, onchip inductors, quality factor, self resonance, substrate loss. I.
Generating sparse partial inductance matrices with guaranteed stability
 In ICCAD
, 1995
"... This paper proposes a definition of magnetic vector potential that can be used to evaluate sparse partial inductance matrices. Unlike the commonly applied procedure of discarding the smallest matrix terms, the proposed approach maintains accuracy at middle and high frequencies and is guaranteed to b ..."
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Cited by 32 (5 self)
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This paper proposes a definition of magnetic vector potential that can be used to evaluate sparse partial inductance matrices. Unlike the commonly applied procedure of discarding the smallest matrix terms, the proposed approach maintains accuracy at middle and high frequencies and is guaranteed to be positive definite for any degree of sparsity (thereby producing stable circuit solutions). While the proposed technique is strictly based upon potential theory (i.e. the invariance of potential differences on the zero potential reference choice), the technique is, nevertheless, presented and discussed in both circuit and magnetic terms. The conventional and the proposed sparse formulation techniques are contrasted in terms of eigenvalues and circuit simulation results on practical examples. 1
SPIE: Sparse Partial Inductance Extraction
 in DAC
, 1997
"... Extracting the inductance of complex interconnect topologies is a formidable task, and simulating the resulting dense partial inductance matrix is even more difficult. Furthermore, it is well known that simply discarding smallest terms to sparsify the inductance matrix can render the partial inducta ..."
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Cited by 18 (2 self)
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Extracting the inductance of complex interconnect topologies is a formidable task, and simulating the resulting dense partial inductance matrix is even more difficult. Furthermore, it is well known that simply discarding smallest terms to sparsify the inductance matrix can render the partial inductance matrix indefinite and result in an unstable circuit model. In this paper, we describe a methodology for incrementally generating a sparse partial inductance matrix based on using moments about s=0 to determine when a sufficient number of mutual inductances have been captured. The minimally required mutual inductances are extracted for a provably stable model. 1.0 Introduction Inductance extraction is difficult because mutual inductance depends on the current return path  which is unknown prior to extracting and simulating a circuit model. Rosa introduced the concept of partial inductances [1][5] to avoid this difficulty by assuming that each segment has a return current at infinity....
Inductance 101: Modeling and Extraction
 Proceedings of Design Automation Conference
, 2001
"... Modeling magnetic interactions for onchip interconnect has become an issue of great interest for integrated circuit design in recent years. This tutorial paper describes the basic concepts of magnetic interaction, loop and partial inductance, along with some of the high frequency effects such as s ..."
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Cited by 16 (1 self)
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Modeling magnetic interactions for onchip interconnect has become an issue of great interest for integrated circuit design in recent years. This tutorial paper describes the basic concepts of magnetic interaction, loop and partial inductance, along with some of the high frequency effects such as skin and proximity effect.
IC analyses including extracted inductance model
 in Proc. Design Automation Conf
, 1999
"... IC inductance extraction generally produces either port inductances based on simplified current path assumptions or a complete partial inductance matrix. Combining either of these results with the IC interconnect resistance and capacitance models significantly complicates most IC design and verifica ..."
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Cited by 12 (2 self)
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IC inductance extraction generally produces either port inductances based on simplified current path assumptions or a complete partial inductance matrix. Combining either of these results with the IC interconnect resistance and capacitance models significantly complicates most IC design and verification methodologies. In this tutorial paper we will review some of the analysis and verification problems associated with on–chip inductance, and present a subset of recent results for partially addressing the challenges which lie ahead.
Analysis of eddycurrent losses over conductive substrates with applications to monolithic inductors and transformers
 IEEE Transactions on Microwave Theory and Techniques
, 2001
"... Abstract—In this paper, a closedform integral representation for the eddycurrent losses over a conductive substrate is presented. The results are applicable to monolithic inductors and transformers, especially when such structures are realized over an epitaxial CMOS substrate. The technique is ver ..."
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Cited by 9 (0 self)
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Abstract—In this paper, a closedform integral representation for the eddycurrent losses over a conductive substrate is presented. The results are applicable to monolithic inductors and transformers, especially when such structures are realized over an epitaxial CMOS substrate. The technique is verified against measured results from 100 MHz to 14 GHz for spiral inductors. Index Terms—CMOS substrate losses, eddy currents, monolithic inductors, monolithic transformers, spiral inductors, spiral transformers. I.
Equipotential Shells for Efficient Inductance Extraction
 IEEE Transactions on ComputerAided Design of Integrated Circuits & Systems
, 2001
"... Abstract—To make threedimensional (3D) onchip interconnect inductance extraction tractable, it is necessary to ignore parasitic couplings without compromising critical properties of the interconnect system. It is demonstrated that simply discarding faraway mutual inductance couplings can lead to ..."
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Cited by 8 (0 self)
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Abstract—To make threedimensional (3D) onchip interconnect inductance extraction tractable, it is necessary to ignore parasitic couplings without compromising critical properties of the interconnect system. It is demonstrated that simply discarding faraway mutual inductance couplings can lead to an unstable approximate inductance matrix. In this paper, we describe an equipotential shell methodology, which generates a partial inductance matrix that is sparse yet stable and symmetric. We prove the positive definiteness of the resulting approximate inductance matrix when the equipotential shells are properly defined. Importantly, the equipotential shell approach also provably preserves the inductance of loops if they are enclosed entirely within the shells of their segments. Methods for sizing the shells to control the accuracy are presented. To demonstrate the overall efficacy for onchip extraction, ellipsoid shells, which are a special case of the general equipotential shell approach, are presented and demonstrated for both onchip and systemlevel extraction examples. Index Terms—Circuit, inductance, interconnect, modeling. I.
Mutual inductance and force exerted between thick coils
 Progress In Electromagnetics Research, Vol. 102, 367–380, In Electromagnetics Research B
"... Abstract—We present exact threedimensional semianalytical expressions of the force exerted between two coaxial thick coils with rectangular crosssections. Then, we present a semianalytical formulation of their mutual inductance. For this purpose, we have to calculate six and seven integrations f ..."
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Cited by 6 (2 self)
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Abstract—We present exact threedimensional semianalytical expressions of the force exerted between two coaxial thick coils with rectangular crosssections. Then, we present a semianalytical formulation of their mutual inductance. For this purpose, we have to calculate six and seven integrations for calculating the force and the mutual inductance respectively. After mathematical manipulations, we can obtain semianalytical formulations based on only two integrations. It is to be noted that such integrals can be evaluated numerically as they are smooth and derivable. Then, we compare our results with the filament and the finite element methods. All the results are in excellent agreement. 1.