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A Framework For Solving Vlsi Graph Layout Problems
 JOURNAL OF COMPUTER AND SYSTEM SCIENCES
, 1984
"... This paper introduces a new divideandconquer framework for VLSI graph layout. Universally close upper and lower bounds are obtained for important cost functions such as layout area and propagation delay. The framework is also effectively used to design regular and configurable layouts, to assemble ..."
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Cited by 169 (4 self)
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This paper introduces a new divideandconquer framework for VLSI graph layout. Universally close upper and lower bounds are obtained for important cost functions such as layout area and propagation delay. The framework is also effectively used to design regular and configurable layouts, to assemble large networks of processors using restructurable chips, and to configure networks around faulty processors. It is also shown how good graph partitioning heuristics may be used to develop a provably good layout strategy.
Protein Folding in the HydrophobicHydrophilic (HP) Model is NPcomplete
, 1998
"... One of the simplest and most popular biophysical models of protein folding is the hydrophobichydrophilic (HP) model. The HP model abstracts the hydrophobic interaction in protein folding by labeling the amino acids as hydrophobic (H for nonpolar) or hydrophilic (P for polar). Chains of amino acid ..."
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Cited by 159 (0 self)
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One of the simplest and most popular biophysical models of protein folding is the hydrophobichydrophilic (HP) model. The HP model abstracts the hydrophobic interaction in protein folding by labeling the amino acids as hydrophobic (H for nonpolar) or hydrophilic (P for polar). Chains of amino acids are con6gured as selfavoiding nalks on the 3D cubic lattice, where an optimal conformation maximizes the number of adjacencies between H’s. In this paper, the protein folding problem under the HP model on the cubic lattice is shown to be NPcomplete. This means that the protein folding problem belongs to a large set of problems that are believed to be computationally intractable.
Special Purpose Parallel Computing
 Lectures on Parallel Computation
, 1993
"... A vast amount of work has been done in recent years on the design, analysis, implementation and verification of special purpose parallel computing systems. This paper presents a survey of various aspects of this work. A long, but by no means complete, bibliography is given. 1. Introduction Turing ..."
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Cited by 81 (6 self)
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A vast amount of work has been done in recent years on the design, analysis, implementation and verification of special purpose parallel computing systems. This paper presents a survey of various aspects of this work. A long, but by no means complete, bibliography is given. 1. Introduction Turing [365] demonstrated that, in principle, a single general purpose sequential machine could be designed which would be capable of efficiently performing any computation which could be performed by a special purpose sequential machine. The importance of this universality result for subsequent practical developments in computing cannot be overstated. It showed that, for a given computational problem, the additional efficiency advantages which could be gained by designing a special purpose sequential machine for that problem would not be great. Around 1944, von Neumann produced a proposal [66, 389] for a general purpose storedprogram sequential computer which captured the fundamental principles of...
Randomized Routing on FatTrees
 Advances in Computing Research
, 1996
"... Fattrees are a class of routing networks for hardwareefficient parallel computation. This paper presents a randomized algorithm for routing messages on a fattree. The quality of the algorithm is measured in terms of the load factor of a set of messages to be routed, which is a lower bound on the ..."
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Cited by 55 (11 self)
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Fattrees are a class of routing networks for hardwareefficient parallel computation. This paper presents a randomized algorithm for routing messages on a fattree. The quality of the algorithm is measured in terms of the load factor of a set of messages to be routed, which is a lower bound on the time required to deliver the messages. We show that if a set of messages has load factor on a fattree with n processors, the number of delivery cycles (routing attempts) that the algorithm requires is O(+lg n lg lg n) with probability 1 \Gamma O(1=n). The best previous bound was O( lg n) for the offline problem in which the set of messages is known in advance. In the context of a VLSI model that equates hardware cost with physical volume, the routing algorithm can be used to demonstrate that fattrees are universal routing networks. Specifically, we prove that any routing network can be efficiently simulated by a fattree of comparable hardware cost. 1 Introduction Fattrees constitute...
CommunicationEfficient Parallel Algorithms for Distributed RandomAccess Machines
 Algorithmica
, 1988
"... This paper introduces a model for parallel computation, called the distributed randomaccess machine (DRAM), in which the communication requirements of parallel algorithms can be evaluated. A DRAM is an abstraction of a parallel computer in which memory accesses are implemented by routing messages ..."
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Cited by 38 (2 self)
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This paper introduces a model for parallel computation, called the distributed randomaccess machine (DRAM), in which the communication requirements of parallel algorithms can be evaluated. A DRAM is an abstraction of a parallel computer in which memory accesses are implemented by routing messages through a communication network. A DRAM explicitly models the congestion of messages across cuts of the network. We introduce the notion of a conservative algorithm as one whose communication requirements at each step can be bounded by the congestion of pointers of the input data structure across cuts of a DRAM. We give a simple lemma that shows how to "shortcut" pointers in a data structure so that remote processors can communicate without causing undue congestion. We give O(lg n)step, linearprocessor, linearspace, conservative algorithms for a variety of problems on n node trees, such as computing treewalk numberings, finding the separator of a tree, and evaluating all subexpressions ...
On Linear Layouts of Graphs
, 2004
"... In a total order of the vertices of a graph, two edges with no endpoint in common can be crossing, nested, or disjoint. A kstack (resp... ..."
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Cited by 37 (23 self)
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In a total order of the vertices of a graph, two edges with no endpoint in common can be crossing, nested, or disjoint. A kstack (resp...
ThreeDimensional Orthogonal Graph Drawing
, 2000
"... vi Declaration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii Acknowledgements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix List of Tables . . . . . . . . . . . . ..."
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Cited by 33 (13 self)
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vi Declaration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii Acknowledgements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiii List of Algorithms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiv I Orthogonal Graph Drawing 1 1
ThreeDimensional Orthogonal Graph Drawing with Optimal Volume
"... An orthogonal drawing of a graph is an embedding of the graph in the rectangular grid, with vertices represented by axisaligned boxes, and edges represented by paths in the grid which only possibly intersect at common endpoints. In this paper, we study threedimensional orthogonal drawings and prov ..."
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Cited by 24 (9 self)
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An orthogonal drawing of a graph is an embedding of the graph in the rectangular grid, with vertices represented by axisaligned boxes, and edges represented by paths in the grid which only possibly intersect at common endpoints. In this paper, we study threedimensional orthogonal drawings and provide lower bounds for three scenarios: (1) drawings where vertices have bounded aspect ratio, (2) drawings where the surface of vertices is proportional to their degree, and (3) drawings without any such restrictions. Then we show that these lower bounds are asymptotically optimal, by providing constructions that match the lower bounds in all scenarios within an order of magnitude.
Leiserson, “Waferscale integration of systolic arrays
 IEEE Trans. Comput
, 1985
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Pathwidth and ThreeDimensional StraightLine Grid Drawings of Graphs
"... We prove that every nvertex graph G with pathwidth pw(G) has a threedimensional straightline grid drawing with O(pw(G) n) volume. Thus for ..."
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Cited by 23 (12 self)
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We prove that every nvertex graph G with pathwidth pw(G) has a threedimensional straightline grid drawing with O(pw(G) n) volume. Thus for