Interactive theorem proving provides a general approach to modeling and verification of both finite-state and infinite-state systems but requires significant human efforts to deal with many tedious proofs. On the other hand, modelchecking is limited to some application domain with small finite-state space. A natural thought for this problem is to integrate these two approaches. To keep the consistency of the integration and ensure the correctness of verification, we suggest to use type theory based theorem provers (e.g. Lego) as the platform for the integration and build a model-checker to do parts of the verification automatically. We formalise a verification system of both CCS and an imperative language in the proof development system Lego which can be used to verify both finite-state and infinite-state problems. Then a model-checker, LegoMC, is implemented to generate Lego proof terms for finite-state problems automatically. Therefore people can use Lego to verify a general problem ...

This report presents a new operating system kernel which addresses the above factors for a shared memory multiprocessing environment. This design is geared specifically towards uniformly shared memory architectures, and not non-uniform architectures (NUMA) or distributed 1

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this paper. Motivated by their first work Moir and Anderson developed renaming algorithms, in the read/write model, when such a bound on the maximum number of processes is known in advance. This led to a sequence of works on the renaming problem in this model [MA95, MG96, BGHM95] that lead to a long-lived (2K \Gamma 1)-renaming algorithm with O(K ) step complexity and O(K space complexity [Moi98]. These works employed various variants of the splitter building block which is a descendant of Lamport's adaptive mutual exclusion algorithm, however the last one [Moi98] depends on an additional work which is the first long-lived renaming algorithm by Burns and Peterson [BP89]

60dB 4.20 512 96 ETSI-A ETSI-A ETSI-1 60dB 4.20 1536 512 AWGN-140 AWGN-140 Draft Recommendation G.992.2 140 14 T1.601 #9 1536kbps 256kbps 49 Annex A G.992.2 15 T1.601 #9 1536kbps 256kbps 24 DSL 16 Shortened T1.601#7 1536kbps 256kbps 24 HDSL Table 47. Extended Reach Test Cases NOTE1: A goal of future enhancements of this Recommendation is to make the "Extended Reach Cases" mandatory. NOTE2: Performance levels do not reflect the effect of customer premise wiring, which is expected to reduce data rate.G.992.2G.992.2G.992.2 Draft Recommendation G.992.2 139 ANNEX D D.1 System Performance for North America All test loops specified in this section shall be used for G.992.2 and testing shall confirm to the following: . No power cutback on upstream transmitter. . Margin=4 dB . BER=10 -7 . Background noise = -140 dBm/Hz . Rates, except where noted,

family of four mutual exclusion algorithms is t l presented. Its members vary from a simple three-bi inear wait mutual exclusion to the four-bit first-come e a first-served algorithm immune to various faults. Th lgorithms are based on a scheme similar to the e w Morris's solution of the mutual exclusion with thre eak semaphores. The presented algorithms compare a favorably with equivalent published mutual exclusion lgorithms in their program's size and the number of required communication bits.

The problem of the mutual exclusion of several independent processes from simultaneous access to a "critical section " is discussed for the case where there are two distinct classes of processes known as "readers" and "writers. " The "readers " may share the section with each other, but the "writers " must have exclusive access. Two solutions are presented: one for the case where we wish minimum delay for the readers; the other for the case where we wish writing to take place as early as possible. Key Words and Phrases: mutual exclusion, critical section, shared access to resources

where he has pursued his research in synchronization and transactional memory under

A new solution to the concurrent programming control (mutual exclusion) problem that is immune to process failures and restarts is presented. The algorithm uses just four values of shared memory per process, which is within one value of the known lower bound. The algorithm is implemented using two binary variables that make it immune to read errors occurring during writes, that is, "flickering bits."

Abstract not found