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12
Improving Functional Density Through Run-Time Circuit Reconfiguration
, 1997
"... orting a C compiler to the DISC processor. Justin Diether assisted in the design, hand-layout, and testing of many partially reconfigured circuits. I would also like to thank Paul Graham for his generous assistance and support of our many mutual activities, classes, and projects at BYU. Other gradua ..."
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Cited by 42 (2 self)
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orting a C compiler to the DISC processor. Justin Diether assisted in the design, hand-layout, and testing of many partially reconfigured circuits. I would also like to thank Paul Graham for his generous assistance and support of our many mutual activities, classes, and projects at BYU. Other graduate students assisting me with this work include Russel Peterson, Mike Rencher, Richard Ross, and Peter Bellows. My advisor, Brad Hutchings, provided essential assistance and encouragement in all of the projects, ideas, and results presented within this work. My decision to complete this degree and write this dissertation was influenced largely by his advice and positive encouragement. Brent Nelson and other faculty members within the Electrical and Computer Engineering department at BYU have provided critical feedback on a wide variety of topics relating to this work. I would also like to acknowledge the insight and assistance of many collaborators researching closely related subjects. For
Optimal Code Selection in DAGs
- In 26th Annual ACM SIGACT-SIGPLAN Symposium on the Principles of Programming Languages
, 1999
"... ing with credit is permitted. To copy otherwise, to republish, to post on servers, or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from Publications Dept, ACM Inc., fax +1 (212) 869-0481, or permissions@acm.org. Optimal Code Selection in DAGs M. An ..."
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Cited by 15 (0 self)
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ing with credit is permitted. To copy otherwise, to republish, to post on servers, or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from Publications Dept, ACM Inc., fax +1 (212) 869-0481, or permissions@acm.org. Optimal Code Selection in DAGs M. Anton Ertl Institut fur Computersprachen Technische Universitat Wien Argentinierstrae 8, 1040 Wien, Austria anton@mips.complang.tuwien.ac.at http://www.complang.tuwien.ac.at/anton/ Tel.: (+43-1) 58801 18515 Fax.: (+43-1) 58801 18598 Abstract We extend the tree parsing approach to code selection to DAGs. In general, our extension does not produce the optimal code selection for all DAGs (this problem would be NPcomplete) , but for certain code selection grammars, it does. We present a method for checking whether a code selection grammar belongs to this set of DAG-optimal grammars, and use this method to check code selection grammars adapted from lcc: the grammars for the MIPS and SPARC ...
Implementation of Stack-Based Languages on Register Machines
, 1996
"... Languages with programmer-visible stacks (stack-based languages) are used widely, as intermediate languages (e.g., JavaVM, FCode), and as languages for human programmers (e.g., Forth, PostScript). However, the prevalent computer architecture is the register machine. This poses the problem of efficie ..."
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Cited by 13 (0 self)
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Languages with programmer-visible stacks (stack-based languages) are used widely, as intermediate languages (e.g., JavaVM, FCode), and as languages for human programmers (e.g., Forth, PostScript). However, the prevalent computer architecture is the register machine. This poses the problem of efficiently implementing stack-based languages on register machines. A straight-forward implementation of the stack consists of a memory area that contains the stack items, and a pointer to the top-of-stack item. The basic
Supporting FPGA Microprocessors through Retargetable Software Tools
- in Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines
, 1996
"... FPGA systems outperform many ASIC and super computer systems through effective use of the reconfigurable resource. Reusing design effort across different applications requires a standard, flexible software environment. Driving FPGA systems from ANSI C is possible using lcc (an ANSI C compiler) targe ..."
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Cited by 10 (1 self)
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FPGA systems outperform many ASIC and super computer systems through effective use of the reconfigurable resource. Reusing design effort across different applications requires a standard, flexible software environment. Driving FPGA systems from ANSI C is possible using lcc (an ANSI C compiler) targeted at an FPGA system and dasm (a retargetable, flexible assembler) . The compiler supports custom hardware capabilities of FPGA systems, as well as all constructs of C. The assembler reads instruction definitions at assemble time, allowing the user to add new custom hardware functions which dasm can assemble correctly to an instruction stream the hardware executes. A source code debugger has been implemented for this system. 1 Introduction FPGAs are capable of achieving high performance on many application-specific tasks. In many cases performance achievable with FPGAs on certain applications exceeds comparable ASIC designs or even super computers[2, 7]. One approach used in obtaining this...
Rapid Prototyping Using Field Programmable Logic Devices
, 2000
"... advances in recent years, and many are used in digital design, computer architecture, and VLSI courses. Many schools now use commercial CAD tool that most CAD tool vendors, such as Cadence, Mentor, and Synopsys, provide at a greatly reduced cost---ranging from a few thousand dollars a year to free ..."
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Cited by 7 (5 self)
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advances in recent years, and many are used in digital design, computer architecture, and VLSI courses. Many schools now use commercial CAD tool that most CAD tool vendors, such as Cadence, Mentor, and Synopsys, provide at a greatly reduced cost---ranging from a few thousand dollars a year to free. Many of the educational site licenses do not include the bundled third-party tools and preclude the use of this software on student-owned PCs. While commercial Unix workstation-based CAD tools offer many advantages, few schools have the vast quantities of high-end workstations needed to train and support large numbers of undergraduate students and only use these workstations in the more advanced courses. Student versions of CAD tools for PCs from FPLD vendors, such as Altera and Xilinx, are available free or at a nominal cost. Many digital design and computer architecture texts now James O. Hamblen Georgia Institute of Technology THE AUTHOR DESCRIBES A
Efficient Instruction Scheduling for Delayed-Load Architectures
- ACM Trans. Program. Lang. Syst
, 1995
"... this article was presented at the ACM SIGPLAN '91 Conference on Programming Languages Design and Implementation. Authors' addresses: S. M. Kurlander, C. N. Fischer, Computer Sciences Department, University of Wisconsin-Madison, 1210 W. Dayton St., Madison, WI 53706; email: fsmk; fischerg@cs.wisc.edu ..."
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Cited by 7 (0 self)
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this article was presented at the ACM SIGPLAN '91 Conference on Programming Languages Design and Implementation. Authors' addresses: S. M. Kurlander, C. N. Fischer, Computer Sciences Department, University of Wisconsin-Madison, 1210 W. Dayton St., Madison, WI 53706; email: fsmk; fischerg@cs.wisc.edu; T. A. Proebsting, Department of Computer Science, University of Arizona, Tucson, AZ 85721; email: todd@cs.arizona.edu. Permission to copy without fee all or part of this material is granted provided that the copies are not made or distributed for direct commercial advantage, the ACM copyright notice and the title of the publication and its date appear, and notice is given that copying is by permission of ACM. To copy otherwise, or to republish, requires a fee and/or specific permission. c fl 2 \Delta Steven M. Kurlander et al. Optimal Nonoptimal , r1 , r1 , r2 , r2 , r3 nop add r1, r2, r1 add r1, r2, r1
Integrating Gnat/Gcc into a Timing Analysis Environment
- In 10th EUROMICRO Workshop on Real Time Systems
, 1998
"... Recent research on timing analysis has focused on static methods to predict worst-case execution times that provide safe approximations of the actual worst-case execution time of real-time tasks. Since these predictions are verifiable, they can be used in schedulability analysis so that the overall ..."
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Cited by 4 (0 self)
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Recent research on timing analysis has focused on static methods to predict worst-case execution times that provide safe approximations of the actual worst-case execution time of real-time tasks. Since these predictions are verifiable, they can be used in schedulability analysis so that the overall temporal behavior of tasks can be analyzed. This paper details our efforts to integrate a commonly available and widely accepted compiler, the Gnat/Gcc family, into our tool set for timing analysis. We discuss the design and implementation of our modifications to Gnat/Gcc, where we accommodated our enhancements in a widely portable way within the common back-end of Gnat and Gcc. With this work, it is our aim to make the analytical approach of static timing analysis available to the real-time community. 1. Introduction Real-time applications are concerned with the timely execution of tasks in response to events. In this context, the deadline of a task describes the latest point in time wher...
The lcc 4.x Code-Generation Interface
, 2001
"... Lcc is a widely used compiler for Standard C described in A Retargetable C Compiler: Design and Implementation. This report details the lcc 4.x codegeneration interface, which defines the interaction between the targetindependent front end and the target-dependent back ends. This interface super ..."
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Cited by 3 (1 self)
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Lcc is a widely used compiler for Standard C described in A Retargetable C Compiler: Design and Implementation. This report details the lcc 4.x codegeneration interface, which defines the interaction between the targetindependent front end and the target-dependent back ends. This interface supercedes the interface described in Chap. 5 of A Retargetable C Compiler. Additional infomation about lcc is at http://www.cs.princeton.edu/ software/lcc/. Microsoft Research Microsoft Corporation One Microsoft Way Redmond, WA 98052 http://www.research.microsoft.com/ 1 The lcc 4.x Code-Generation Interface 1.
Compiler hacking for source code analysis
- Software Quality Journal
, 2004
"... Many activities related to software quality assessment and improvement, such as empirical model construction, data flow analysis, testing or reengineering, rely on static source code analysis as the first and fundamental step for gathering the necessary input information. In the past, two different ..."
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Cited by 3 (2 self)
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Many activities related to software quality assessment and improvement, such as empirical model construction, data flow analysis, testing or reengineering, rely on static source code analysis as the first and fundamental step for gathering the necessary input information. In the past, two different strategies have been adopted to develop tool suites. There are tools encompassing or implementing the source parse step, where the parser is internal to the toolkit, and is developed and maintained with it. A different approach builds tools on the top of external already-available components such as compilers that output the program abstract syntax tree, or that make it available via an API. This paper discusses techniques, issues and challenges linked to compiler patching or wrapping for analysis 1 purposes. In particular, different approaches for accessing the compiler parsing information are compared, and the techniques used to decouple the parsing front end from the analysis modules are discussed. Moreover, the paper presents an approach and a tool, XOgastan, developed exploiting the gcc/g++ ability to syntax tree format into a Graph eXchange Language representation, which makes it possible to take advantage of currently available XML tools for any subsequent analysis step. The tool is illustrated and its design discussed, showing its architecture and the main implementation choices made.

