Results 11  20
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35
SpaceTime Tradeoffs in Memory Hierarchies
, 1993
"... The speed of CPUs is accelerating rapidly, outstripping that of peripheral storage devices and making it increasingly difficult to keep CPUs busy. Multilevel memory hierarchies, scaled to simulate singlelevel memories, are increasing in importance. In this paper we introduce the Memory Hierarchy ..."
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Cited by 9 (0 self)
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The speed of CPUs is accelerating rapidly, outstripping that of peripheral storage devices and making it increasingly difficult to keep CPUs busy. Multilevel memory hierarchies, scaled to simulate singlelevel memories, are increasing in importance. In this paper we introduce the Memory Hierarchy Game, a multilevel pebble game simulating data movement in memory hierarchies for straightline computations. This game provides a framework for deriving upper and lower bounds on computation time and the I/O time at each level in a memory hierarchy. We apply this framework to a representative set of problems including matrix multiplication and the Fourier transform. We also discuss conditions on hierarchies under which they act as fast flat memories.
On the Time and Space Complexity of Computation Using WriteOnce Memory or Is Pen Really Much Worse than Pencil?
, 1992
"... We introduce a model of computation based on the use of writeonce memory. Writeonce memory has the property that bits may be set but not reset. Our model consists of a RAM with a small amount of regular memory (such as logarithmic or n = for ~ < 1, where n is the size of the problem) and a polyno ..."
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Cited by 6 (1 self)
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We introduce a model of computation based on the use of writeonce memory. Writeonce memory has the property that bits may be set but not reset. Our model consists of a RAM with a small amount of regular memory (such as logarithmic or n = for ~ < 1, where n is the size of the problem) and a polynomial amount of writeonce memory. Bounds are given on the time required to simulate on writeonce memory algorithms which originally run on a RAM with a polynomial amount of regular memory. We attempt to characterize algorithms that can be simulated on our writeonce memory model with very little slowdown. A persistent computation is one in which, at all times, the memory state of the computation at any previous point in time can be reconstructed. We show that any data structure or computation implemented on this writeonce memory model can be made persistent without sacrificing much in the way of running time or space. The space requirements of algorithms running on the writeonce model are studied. We show that general simulations of algorithms originally running on a RAM with regular memory by algorithms running on our writeonce memory model require space proportional to the number of steps simulated. In order to study the space complexity further, we define an analogue of the pebbling game, called the pebblesticker game. A sticker is different from a pebble in that it
Pebbles and Branching Programs for Tree Evaluation
, 2009
"... We introduce the tree evaluation problem, show that it is in LogDCFL (and hence in P), and study its branching program complexity in the hope of eventually proving a superlogarithmic space lower bound. The input to the problem is a rooted, balanced dary tree of height h, whose internal nodes are la ..."
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Cited by 6 (3 self)
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We introduce the tree evaluation problem, show that it is in LogDCFL (and hence in P), and study its branching program complexity in the hope of eventually proving a superlogarithmic space lower bound. The input to the problem is a rooted, balanced dary tree of height h, whose internal nodes are labeled with dary functions on [k] = {1,...,k}, and whose leaves are labeled with elements of [k]. Each node obtains a value in [k] equal to its dary function applied to the values of its d children. The output is the value of the root. We show that the standard black pebbling algorithm applied to the binary tree of height h yields a deterministic kway branching program with Θ(k h) states solving this problem, and we prove that this upper bound is tight for h = 2 and h = 3. We introduce a simple semantic restriction called thrifty on kway branching programs solving tree evaluation problems and show that the same state bound of Θ(k h) is tight (up to a constant factor) for all h ≥ 2 for deterministic thrifty programs. We introduce fractional pebbling for trees and show that this yields nondeterministic thrifty programs with Θ(k h/2+1) states solving the Boolean problem
Incremental branching programs
, 2007
"... We propose a new model of restricted branching programs specific to solving GEN problems, which we call incremental branching programs. We show that syntactic incremental branching programs capture previously studied models of computation for the problem GEN, namely marking machines [Co74] and Poon’ ..."
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Cited by 4 (3 self)
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We propose a new model of restricted branching programs specific to solving GEN problems, which we call incremental branching programs. We show that syntactic incremental branching programs capture previously studied models of computation for the problem GEN, namely marking machines [Co74] and Poon’s extension [Po93] of jumping automata on graphs [CoRa80]. We then prove exponential size lower bounds for our syntactic incremental model, and for some other variants of branching program computation for GEN. We further show that nondeterministic syntactic incremental branching programs are provably stronger than their deterministic counterpart when solving a natural NLcomplete GEN subproblem. It remains open if syntactic incremental branching programs are as powerful as unrestricted branching programs for GEN problems.
The Size and Depth of Layered Boolean Circuits
"... Abstract. We consider the relationship between size and depth for layered Boolean circuits, synchronous circuits and planar circuits as well as classes of circuits with small separators. In particular, we show that every layered Boolean circuit of size s can be simulated by a layered Boolean circuit ..."
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Cited by 3 (2 self)
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Abstract. We consider the relationship between size and depth for layered Boolean circuits, synchronous circuits and planar circuits as well as classes of circuits with small separators. In particular, we show that every layered Boolean circuit of size s can be simulated by a layered Boolean circuit of depth O ( √ s log s). For planar circuits and synchronous circuits of size s, we obtain simulations of depth O ( √ s). The best known result so far was by Paterson and Valiant [16], and Dymond and Tompa [6], which holds for general Boolean circuits and states that D(f) = O(C(f) / log C(f)), where C(f) and D(f) are the minimum size and depth, respectively, of Boolean circuits computing f. The proof of our main result uses an adaptive strategy based on the twoperson pebble game introduced by Dymond and Tompa [6]. Improving any of our results by polylog factors would immediately improve the bounds for general circuits. Key words: Boolean circuits, circuit size, circuit depth, pebble games 1
On the Power of White Pebbles
, 1998
"... We construct a family fG p : pg of directed acyclic graphs such that any black pebble strategy for G p requires p pebbles whereas 3p + 1 pebbles are sufficient when white pebbles are allowed. ..."
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Cited by 3 (0 self)
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We construct a family fG p : pg of directed acyclic graphs such that any black pebble strategy for G p requires p pebbles whereas 3p + 1 pebbles are sufficient when white pebbles are allowed.
Developing Correct and Efficient Logic Programs by Transformation
 Knowledge Engineering Review
, 1996
"... this paper, from formal specifications one may obtain executable, efficient programs by using techniques for transforming logic programs. This is, indeed, one of the reasons that makes logic programming very attractive for program construction. During this final step from specifications to programs, ..."
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Cited by 2 (0 self)
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this paper, from formal specifications one may obtain executable, efficient programs by using techniques for transforming logic programs. This is, indeed, one of the reasons that makes logic programming very attractive for program construction. During this final step from specifications to programs, in order to improve efficiency one may want to use program transformation for avoiding multiple visits of data structures, or replacing complex forms of recursion by tail recursion, or reducing nondeterminism of procedures. This paper is structured as follows. In Section 2 we present the rulebased approach to program transformation and its use for the derivation and synthesis of logic programs from specifications. In Section 3 we consider the schemabased transformation technique for the development of efficient programs. In Section 4 we consider the partial evaluation technique and its use for the specialization of logic programs when the input data are partially known at compile time. In the final section we discuss some of the achievements and challanges of program transformation as a tool for logicbased software engineering. For simplicity reasons in this paper we will only consider definite logic programs, although most of the techniques we will describe can be applied also in the case of general logic programs. We refer to [35, 41] for all notions concerning logic programming and logic program transformation which are not explicitly presented here.
TimeSpace Tradeoffs for BacktoBack FFT Algorithms
 IEEE Trans. Computing C32
, 1983
"... [15] N. Wirth, "Modula: A language for modular multiprogramming," ..."
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[15] N. Wirth, "Modula: A language for modular multiprogramming,"
On the Relative Strength of Pebbling and Resolution
, 2010
"... The last decade has seen a revival of interest in pebble games in the context of proof complexity. Pebbling has proven to be a useful tool for studying resolutionbased proof systems when comparing the strength of different subsystems, showing bounds on proof space, and establishing sizespace trade ..."
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Cited by 2 (1 self)
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The last decade has seen a revival of interest in pebble games in the context of proof complexity. Pebbling has proven to be a useful tool for studying resolutionbased proof systems when comparing the strength of different subsystems, showing bounds on proof space, and establishing sizespace tradeoffs. The typical approach has been to encode the pebble game played on a graph as a CNF formula and then argue that proofs of this formula must inherit (various aspects of) the pebbling properties of the underlying graph. Unfortunately, the reductions used here are not tight. To simulate resolution proofs by pebblings, the full strength of nondeterministic blackwhite pebbling is needed, whereas resolution is only known to be able to simulate deterministic black pebbling. To obtain strong results, one therefore needs to find specific graph families which either have essentially the same properties for black and blackwhite pebbling (not at all true in general) or which admit simulations of blackwhite pebblings in resolution. This paper contributes to both these approaches. First, we design a restricted form of blackwhite pebbling that can be simulated in resolution and show that there are graph families for which such restricted pebblings can be asymptotically better than black pebblings. This proves that, perhaps somewhat unexpectedly, resolution can strictly beat blackonly pebbling, and in particular that the space lower bounds on pebbling formulas in [BenSasson and Nordström 2008] are tight. Second, we present a versatile parametrized graph family with essentially the same properties for black and blackwhite pebbling, which gives sharp simultaneous tradeoffs for black and blackwhite pebbling for various parameter settings. Both of our contributions have been instrumental in obtaining the timespace tradeoff results for resolutionbased proof systems in [BenSasson and Nordström 2009].