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A small depth16 circuit for the aes sbox
 In Dimitris Gritzalis, Steven Furnell, and Marianthi Theoharidou, editors, SEC, volume 376 of IFIP Advances in Information and Communication Technology
, 2012
"... New techniques for reducing the depth of circuits for cryptographic applications are described and applied to the AES Sbox. These techniques also keep the number of gates quite small. The result, when applied to the AES Sbox, is a circuit with depth 16 and only 128 gates. For the inverse, it is al ..."
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New techniques for reducing the depth of circuits for cryptographic applications are described and applied to the AES Sbox. These techniques also keep the number of gates quite small. The result, when applied to the AES Sbox, is a circuit with depth 16 and only 128 gates. For the inverse, it is also depth 16 and has only 127 gates. There is a shared middle part, common to both the Sbox and its inverse, consisting of 63 gates.
T.: Solving circuit optimisation problems in cryptography and cryptanalysis. Eprint can be found at http://eprint.iacr.org/2011/475.pdf
"... Abstract. One of the hardest problems in computer science is the problem of gateefficient implementation. Such optimizations are particularly important in industrial hardware implementations of standard cryptographic algorithms. In this paper we focus on optimizing some small circuits such as Sbo ..."
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Abstract. One of the hardest problems in computer science is the problem of gateefficient implementation. Such optimizations are particularly important in industrial hardware implementations of standard cryptographic algorithms. In this paper we focus on optimizing some small circuits such as Sboxes in cryptographic algorithms. We consider the notion of Multiplicative Complexity, a new important notion of complexity introduced in 2008 by Boyar and Peralta and applied to find interesting optimizations for the Sbox of the AES cipher
supervised by
, 2008
"... Systems at University College London. It is substantially the result of my own work except where explicitly indicated in the text. The report may be freely copied and distributed provided the source is explicitly acknowledged. Spike sorting is the task of grouping action potentials observed in extr ..."
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Systems at University College London. It is substantially the result of my own work except where explicitly indicated in the text. The report may be freely copied and distributed provided the source is explicitly acknowledged. Spike sorting is the task of grouping action potentials observed in extracellular electrophysiological recordings by source neuron. In this thesis a new incremental spike sorting model is proposed that accounts for action potential waveform drift over time, automatically eliminates refractory period violations, and can handle “appearance ” and “disappearance ” of neurons during the course of the recording. The approach is to augment a known timevarying Dirichlet process that ties together a sequence of infinite Gaussian mixture models, one per action potential waveform observation, with an interspikeintervaldependent term that prohibits refractory period violations. The relevant literature on spike sorting as well as (timevarying) Dirchlet process mixture models is reviewed and the new spike sorting model is described in detail, including Monte Carlo methods for performing inference in the model. The performance of the model is compared to two recent spike sorting methods on synthetic data sets as well as on neural data recordings for which a partial ground truth labeling is known. It is shown that the model performs no worse on stationary data and compares favorably if the data contains waveform change over time. Additionally, the behaviour of the model under different parameter settings and under difficult conditions is assessed and possible extensions of the model are discussed. i
Optimizing the AES Sbox using SAT
 In Proc. International Workshop on Implementation of Logics (IWIL
"... In this paper we describe the implementation of a technique for minimizing XOR circuits used in cryptographic algorithms. More precisely, we present our work from [4] for encoding this synthesis problem to SAT with a focus on the case study of optimizing an important component of the Advanced Encryp ..."
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In this paper we describe the implementation of a technique for minimizing XOR circuits used in cryptographic algorithms. More precisely, we present our work from [4] for encoding this synthesis problem to SAT with a focus on the case study of optimizing an important component of the Advanced Encryption Standard (AES) [8]. In addition to these previously published
Synchronous Counting and Computational Algorithm Design
"... Abstract. Consider a complete communication network on n nodes, each of which is a state machine with s states. In synchronous 2counting, the nodes receive a common clock pulse and they have to agree on which pulses are “odd ” and which are “even”. We require that the solution is selfstabilising ( ..."
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Abstract. Consider a complete communication network on n nodes, each of which is a state machine with s states. In synchronous 2counting, the nodes receive a common clock pulse and they have to agree on which pulses are “odd ” and which are “even”. We require that the solution is selfstabilising (reaching the correct operation from any initial state) and it tolerates f Byzantine failures (nodes that send arbitrary misinformation). Prior algorithms are expensive to implement in hardware: they require a source of random bits or a large number of states s. We use computational techniques to construct very compact deterministic algorithms for the first nontrivial case of f = 1. While no algorithm exists for n < 4, we show that as few as 3 states are sufficient for all values n ≥ 4. We prove that the problem cannot be solved with only 2 states for n = 4, but there is a 2state solution for all values n ≥ 6. 1
Novel Value Ordering Heuristics Using NonLinear Optimization In Boolean Satisfiability
, 2012
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Three Years of Experience with Sledgehammer, a Practical Link between Automatic and Interactive Theorem Provers (invited talk)...... 1
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Synthesizing Shortest XOR Circuits using SAT
, 2015
"... In this paper we introduce a technique to find the minimal number of gates in a circuit of XOR gates in linear straightline programs and the application of this technique to cryptography. The technique simply consists of two steps. The first step focuses on reducing the associated decision problem ..."
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In this paper we introduce a technique to find the minimal number of gates in a circuit of XOR gates in linear straightline programs and the application of this technique to cryptography. The technique simply consists of two steps. The first step focuses on reducing the associated decision problem to satisfiability of propositional logic and the second step presents the optimization of the associated decision problem using SATsolvers. 1
Exact Logic Minimization and Multiplicative Complexity of Concrete Algebraic and Cryptographic Circuits
"... Abstract—Two very important NPhard problems in the area of computational complexity are the problems of Matrix Multiplication (MM) and Circuit Optimization. Solving particular cases of such problems yield to improvements in many other problems as they are core subroutines implemented in many othe ..."
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Abstract—Two very important NPhard problems in the area of computational complexity are the problems of Matrix Multiplication (MM) and Circuit Optimization. Solving particular cases of such problems yield to improvements in many other problems as they are core subroutines implemented in many other algorithms. However, obtaining optimal solutions is an intractable problem since the space to explore for each problem is exponentially large. All suggested methodologies rely on wellchosen heuristics, selected according to the topology of the specific problem. Such heuristics may yield to efficient and acceptable solutions but they do not guarantee that no better can be done. In this paper, we suggest a general framework for obtaining solutions to such problems. We have developed a 2step methodology, where in the first place we describe algebraically the problem and then we convert it to a SATCNF problem, which