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Symbolic Boolean manipulation with ordered binarydecision diagrams
 ACM Computing Surveys
, 1992
"... Ordered BinaryDecision Diagrams (OBDDS) represent Boolean functions as directed acyclic graphs. They form a canonical representation, making testing of functional properties such as satmfiability and equivalence straightforward. A number of operations on Boolean functions can be implemented as grap ..."
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Cited by 879 (11 self)
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Ordered BinaryDecision Diagrams (OBDDS) represent Boolean functions as directed acyclic graphs. They form a canonical representation, making testing of functional properties such as satmfiability and equivalence straightforward. A number of operations on Boolean functions can be implemented as graph algorithms on OBDD
Verification of Arithmetic Functions with Binary Moment Diagrams
 IN DESIGN AUTOMATION CONF
, 1994
"... Binary Moment Diagrams (BMDs) provide a canonical representations for linear functions similar to the way Binary Decision Diagrams (BDDs) represent Boolean functions. Within the class of linear functions, we can embed arbitary functions from Boolean variables to real, rational, or integer values. BM ..."
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Cited by 97 (6 self)
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Binary Moment Diagrams (BMDs) provide a canonical representations for linear functions similar to the way Binary Decision Diagrams (BDDs) represent Boolean functions. Within the class of linear functions, we can embed arbitary functions from Boolean variables to real, rational, or integer values. BMDs can thus model the functionality of data path circuits operating over word level data. Many important functions, including integer multiplication, that cannot be represented efficiently at the bit level with BDDs have simple representations at the word level with BMDs. Furthermore, BMDs can represent Boolean functions with around the same complexity as BDDs. We propose
Verification of Arithmetic Circuits with Binary Moment Diagrams
 IN PROCEEDINGS OF THE 32ND ACM/IEEE DESIGN AUTOMATION CONFERENCE
, 1995
"... Binary Moment Diagrams (BMDs) provide a canonical representations for linear functions similar to the way Binary Decision Diagrams (BDDs) represent Boolean functions. Within the class of linear functions, we can embed arbitrary functions from Boolean variables to integer values. BMDs can thus model ..."
Abstract

Cited by 93 (10 self)
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Binary Moment Diagrams (BMDs) provide a canonical representations for linear functions similar to the way Binary Decision Diagrams (BDDs) represent Boolean functions. Within the class of linear functions, we can embed arbitrary functions from Boolean variables to integer values. BMDs can thus model the functionality of data path circuits operating over wordlevel data. Many important functions, including integer multiplication, that cannot be represented efficiently at the bit level with BDDs have simple representations at the word level with BMDs. Furthermore, BMDs can represent Boolean functions with around the same complexity as BDDs. We propose a hierarchical approach to verifying arithmetic circuits, wherecomponentmodulesare first shownto implement their wordlevel specifications. The overall circuit functionality is then verified by composing the component functions and comparing the result to the wordlevel circuit specification. Multipliers with word sizes of up to 256 bits hav...
Efficient Construction of Binary Moment Diagrams for Verifying Arithmetic Circuits
, 1995
"... Binary Decision Diagrams (BDDs) have been used as a very powerful tool for manipulating Boolean functions in various application domains, in particular, design verification of logic circuits. We can representmany practical functions with reasonable size of BDDs, and perform Boolean operations very e ..."
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Cited by 23 (0 self)
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Binary Decision Diagrams (BDDs) have been used as a very powerful tool for manipulating Boolean functions in various application domains, in particular, design verification of logic circuits. We can representmany practical functions with reasonable size of BDDs, and perform Boolean operations very efficiently. Unfortunately, the sizes of the BDDs for representing multiplication are known to blow up exponentially to the number of inputs. Binary Moment Diagrams (BMDs) are graph representations of mappings from binary vectors to integers. BMDs also provide canonical representations to those functions. When we use BMDs, we can represent the output function at the word level. We can represent the functions expressing multiplication with BMDs whose size grows only linearly with the number of variables. Bryant and Chen reported a BMDbased polynomialtime algorithm for verifying multipliers. This approach requires highlevel information such as specifications to subcomponents. From users' point of view, it is convenient to handle circuit descriptions without giving specifications to subcomponents. This paper presents a new technique called backward sweeping. Using this technique, we can verify arithmetic circuits without any highlevel information. Although our experiments are preliminary, the results for array multipliers and Wallacetree multipliers both show that the order of the computation time is approximately n 3:5, where n is the number of inputs. We have successfully veri ed 31bit Wallacetree multipliers in 260 seconds with 3 Mbyte of memory on SPARCstation10/51. We have also built the BMD for c6288 in 72 seconds with 2Mbyte of memory. This result outperforms previous BDDbased approaches for verifying multipliers.
How many Decomposition Types do we need ?
 In European Design & Test Conf
, 1995
"... Decision Diagrams (DDs) are used in many applications in CAD. Various types of DDs, e.g. BDDs, FDDs, KFDDs, differ by their decomposition types. In this paper we investigate the different decomposition types and prove that there are only three that really help to reduce the size of DDs. 1 Introduct ..."
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Cited by 22 (6 self)
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Decision Diagrams (DDs) are used in many applications in CAD. Various types of DDs, e.g. BDDs, FDDs, KFDDs, differ by their decomposition types. In this paper we investigate the different decomposition types and prove that there are only three that really help to reduce the size of DDs. 1 Introduction Decision Diagrams (DDs) are successfully applied in many fields of design automation, e.g. [17, 4, 1, 14, 7, 24, 11, 2, 9]. The most popular type of DD is the Ordered Binary Decision Diagram (OBDD) allowing efficient representation and manipulation of Boolean functions [5]. The more recent techniques have made it possible to handle (some) large functions without any basic variation of the OBDD concept itself. The dynamic variable ordering with sifting introduced by Rudell [21] allows to represent examples which could not be represented by any previous heuristic methods. Moreover, the variable ordering in [21] is handled by the package itself, alleviating the need for variable ordering ...
Logic Design Error Diagnosis and Correction
 IEEE Transactions on VLSI Systems
, 1994
"... She's the neighbor dog who's courting my dog. ..."
Exploiting Structural Similarities in a BDDbased Verification Method
 in Theorem Provers in Circuit Design. 1994, number 901 in Lecture Notes in Computer Science
, 1994
"... . A major challenge in the area of hardware verification is to devise methods that can handle circuits of practical size. This paper intends to show how the applicability of combinational circuit verification tools based on binary decision diagrams (BDDs) can be greatly improved. The introduction of ..."
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Cited by 13 (1 self)
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. A major challenge in the area of hardware verification is to devise methods that can handle circuits of practical size. This paper intends to show how the applicability of combinational circuit verification tools based on binary decision diagrams (BDDs) can be greatly improved. The introduction of dynamic variable ordering techniques already makes these tools more robust; a designer no longer needs to worry about a good initial variable order. In addition, we present a novel approach combining BDDs with a technique that exploits structural similarities of the circuits under comparison. We explain how these similarities can be detected and put to effective use in the verification process. Benchmark results show that the proposed method significantly extends the range of circuits that can be verified using BDDs. 1 Introduction The times when researchers in the CAD field could sit in their ivory tower thinking up neat solutions for theoretical problems belong to the past. Nowadays, ind...
*BMDs Can Delay the Use of Theorem Proving for Verifying Arithmetic Assembly Instructions
 IN FMCAD
, 1996
"... We address the problem of formally verifying arithmetic instructions of microprocessors implemented by microprograms that contain loops. We try to avoid theorem proving techniques using a new symbolic representation: Binary Moment Diagrams (*BMDs). In order to use *BMDs for verifying sequential circ ..."
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Cited by 9 (0 self)
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We address the problem of formally verifying arithmetic instructions of microprocessors implemented by microprograms that contain loops. We try to avoid theorem proving techniques using a new symbolic representation: Binary Moment Diagrams (*BMDs). In order to use *BMDs for verifying sequential circuits as well as microprograms, we extend this representation and define several bitvector level operators. This extension is then integrated into an automatic verification system. We illustrate the paper with examples and we discuss power and weakness of *BMDs.
OKFDDs versus OBDDs and OFDDs
, 1995
"... Ordered Decision Diagrams (ODDs) as a means for the representation of Boolean functions are used in many applications in CAD. Depending on the decomposition type, various classes of ODDs have been defined, the most important being the Ordered Binary Decision Diagrams (OBDDs), the Ordered Functiona ..."
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Cited by 8 (5 self)
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Ordered Decision Diagrams (ODDs) as a means for the representation of Boolean functions are used in many applications in CAD. Depending on the decomposition type, various classes of ODDs have been defined, the most important being the Ordered Binary Decision Diagrams (OBDDs), the Ordered Functional Decision Diagrams (OFDDs) and the Ordered Kronecker Functional Decision Diagrams (OKFDDs). In this paper we clarify the computational power of OKFDDs versus OBDDs and OFDDs from a (more) theoretical point of view. We prove several exponential gaps between specific types of ODDs. Combining these results it follows that a restriction of the OKFDD concept to subclasses, such as OBDDs and OFDDs as well, results in families of functions which lose their efficient representation.
Verification of Arithmetic Circuits Using Binary Moment Diagrams
, 2001
"... Binary Moment Diagrams (BMDs) provide a canonical representations for linear functions similar to the way Binary Decision Diagrams (BDDs) represent Boolean functions. Within the class of linear functions, we can embed arbitrary functions from Boolean variables to real, rational, or integer values. ..."
Abstract

Cited by 6 (0 self)
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Binary Moment Diagrams (BMDs) provide a canonical representations for linear functions similar to the way Binary Decision Diagrams (BDDs) represent Boolean functions. Within the class of linear functions, we can embed arbitrary functions from Boolean variables to real, rational, or integer values. BMDs can thus model the functionality of data path circuits operating over word level data. Many important functions, including integer multiplication, that cannot be represented efficiently at the bit level with BDDs have simple representations at the word level with BMDs. Furthermore, BMDs can represent Boolean functions with around the same complexity as BDDs. We propose