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21
Parallel Multipliers Based on Special Irreducible Pentanomials
 IEEE Transactions on Computers
, 2003
"... The stateoftheart Galois field GF(2m)multipliers offer advantageous space and time complexities when the field is generated by some special irreducible polynomial. To date, the best complexity results have been obtained when the irreducible polynomial is either a trinomial or an equallyspace pol ..."
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Cited by 17 (0 self)
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The stateoftheart Galois field GF(2m)multipliers offer advantageous space and time complexities when the field is generated by some special irreducible polynomial. To date, the best complexity results have been obtained when the irreducible polynomial is either a trinomial or an equallyspace polynomial (ESP). Unfortunately, there exist only a few irreducible ESPs in the range of interest for most of the applications, e.g., errorcorrecting codes, computer algebra, and elliptic curve cryptography. Furthermore, it is not always possible to find an irreducible trinomial of degree m in this range. For those cases, where neither an irreducible trinomial or an irreducible ESP exists, the use of irreducible pentanomials has been suggested. Irreducible pentanomials are abundant, 2and there are several eligible candidates for a given m. Inthis paper, we promote the use of two special types of irreducible pentanomials. We propose new Mastrovito and dual basis multiplier architectures based on these special irreducible pentanomials, and give rigorous analyses of their space and time complexity. Index Terms: Finite fields arithmetic, parallel multipliers, pentanomials, multipliers for GF(2m). 1
Normal Bases over Finite Fields
, 1993
"... Interest in normal bases over finite fields stems both from mathematical theory and practical applications. There has been a lot of literature dealing with various properties of normal bases (for finite fields and for Galois extension of arbitrary fields). The advantage of using normal bases to repr ..."
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Cited by 9 (0 self)
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Interest in normal bases over finite fields stems both from mathematical theory and practical applications. There has been a lot of literature dealing with various properties of normal bases (for finite fields and for Galois extension of arbitrary fields). The advantage of using normal bases to represent finite fields was noted by Hensel in 1888. With the introduction of optimal normal bases, large finite fields, that can be used in secure and e#cient implementation of several cryptosystems, have recently been realized in hardware. The present thesis studies various theoretical and practical aspects of normal bases in finite fields. We first give some characterizations of normal bases. Then by using linear algebra, we prove that F q n has a basis over F q such that any element in F q represented in this basis generates a normal basis if and only if some groups of coordinates are not simultaneously zero. We show how to construct an irreducible polynomial of degree 2 n with linearly i...
Vlsi Architecture For Datapath Integration Of Arithmetic Over GF(2^m) On Digital Signal Processors
 in Proc. IEEE ICASSP'97
, 1997
"... This paper examines the implementation of Finite Field arithmetic, i.e. multiplication, division, and exponentiation, for any standard basis GF(2 ) with m8 on a DSP datapath. We introduce an opportunity to exploit cells and the interconnection structure of a typical binary multiplier unit for the ..."
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Cited by 8 (4 self)
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This paper examines the implementation of Finite Field arithmetic, i.e. multiplication, division, and exponentiation, for any standard basis GF(2 ) with m8 on a DSP datapath. We introduce an opportunity to exploit cells and the interconnection structure of a typical binary multiplier unit for the Finite Field operations by adding just a small overhead of logic. We develop division and exponentiation based on multiplication on the algorithm level and present a simple scheme for implementation of all operations on a processor datapath.
Irreducible Polynomials of Given Forms
, 1999
"... We survey under a unified approach on the number of irreducible polynomials of given forms: x + g(x) where the coefficient vector of g comes from an affine algebraic variety over Fq . For instance, all but 2 log n coefficients of g(x) are prefixed. The known results are mostly for large q and little ..."
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Cited by 7 (4 self)
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We survey under a unified approach on the number of irreducible polynomials of given forms: x + g(x) where the coefficient vector of g comes from an affine algebraic variety over Fq . For instance, all but 2 log n coefficients of g(x) are prefixed. The known results are mostly for large q and little is know when q is small or fixed. We present computer experiments on several classes of polynomials over F 2 and compare our data with the results that hold for large q. We also mention some related applications and problems of (irreducible) polynomials with special forms.
A low complexity and a low latency bit parallel systolic multiplier over GF(2 m ) using an optimal normal basis of type II
 In Proceedings of the 16th IEEE Symposium on Computer Arithmetic (ARITH16’03
, 2003
"... Using the self duality of an optimal normal basis (ONB) of type II, we present a bit parallel systolic multiplier over GF (2 m) which has a low hardware complexity and a low latency. We show that our multiplier has a latency m + 1 and the basic cell of our circuit design needs 5 latches (flipflops) ..."
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Cited by 6 (0 self)
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Using the self duality of an optimal normal basis (ONB) of type II, we present a bit parallel systolic multiplier over GF (2 m) which has a low hardware complexity and a low latency. We show that our multiplier has a latency m + 1 and the basic cell of our circuit design needs 5 latches (flipflops). On the other hand, most of other multipliers of the same type have latency 3m and the basic cell of each multiplier needs 7 latches. Comparing the gates areas in each basic cell, we find that the hardware complexity of our multiplier is 25 percent reduced from the multipliers with 7 latches. 1.
A New Aspect of Dual Basis for Efficient Field Arithmetic
 IN PROCEEDINGS OF ESCOL 7
, 1990
"... In this manuscript we consider the special type of dual basis for finite fields, GF (2 m ), where the variants of m are presented in the following contents. Here we introduce our field representing method for its efficient arithmetic(of field multiplication and field inversion). It revealed a very ..."
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Cited by 4 (0 self)
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In this manuscript we consider the special type of dual basis for finite fields, GF (2 m ), where the variants of m are presented in the following contents. Here we introduce our field representing method for its efficient arithmetic(of field multiplication and field inversion). It revealed a very effective role for both software and VLSI implementations, but the aspect of hardware design for its structure is out of this manuscript and so, here, we deal only the case of its software implementation (the efficiency of hardware implementation is appeared in another article submitted to IEEE Transactions on Computers). A brief description of this advantageous characteristics is that (1) the field multiplication can be constructed only by k( m 2 ) rotations and the same amount of vector XOR processes, (2) there is needed no additional work load as basis changing(from standard to the dual basis or from the dual basis to standard basis as the conventional dual based arithmetic does), (3...
Quadrinomial Modular Arithmetic Using Modified Polynomial Basis
 In Proceedings of the International Conference on Information Technology: Coding and Computing ( ITCC’2005
, 2005
"... Finite field arithmetic has advantageous space and time complexity when the field is built with a sparse polynomial. Katti and Brennan in their paper [3] introduced a new type of polynomial, wich we will call here the Nearly All One Polynomial (NAOP), and they show that the NAOP modular arithmetic i ..."
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Cited by 3 (0 self)
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Finite field arithmetic has advantageous space and time complexity when the field is built with a sparse polynomial. Katti and Brennan in their paper [3] introduced a new type of polynomial, wich we will call here the Nearly All One Polynomial (NAOP), and they show that the NAOP modular arithmetic is roughly equivalent to quadrinomial arithmetic. In this paper we will introduce a new representation: the modified polynomial basis, to compute modulo quadrinomials. We obtain a faster bitparallel multiplier in F2n with time complexity equal to TA + (2 + ⌈log2(n + 1)⌉)TX and a time complexity equal to (n + 1) 2 AND and ((n + 1) 2 + m − k − 1) XOR. For fields F2n of degree n ranging between 160 and 500, which cannot be constructed with an irreducible trinomial or an optimal normal basis, our multiplier improve the time complexity by a factor of 8 % the previous multipliers proposed of [6, 3, 8], in compensation the space complexity increase by a factor
VLSI Architectures for Multiplication in GF(2^m) for Application Tailored Digital Signal Processors
 IEEE Workshop on VLSI Digital Signal Processing
, 1996
"... Finite Field Arithmetic plays an important role in coding theory, cryptography and their applications. Several hardware solutions using Finite Field Arithmetic have already been developed but none of them are user programmable. This is probably one reason why BCH codes are not commonly used in mobil ..."
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Cited by 3 (0 self)
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Finite Field Arithmetic plays an important role in coding theory, cryptography and their applications. Several hardware solutions using Finite Field Arithmetic have already been developed but none of them are user programmable. This is probably one reason why BCH codes are not commonly used in mobile communication applications even though these codes have very desirable properties regarding burst error correction. This work presents architectures for multiplication in GF(2 ) applicable to Digital Signal Processors. First a method is proposed to build an array of gates for hardware multiplication in GF(2 ). Then an approach will be shown that combines the hardware of a typical standard binary arithmetic multiplier with a GF(2 ) multiplier. Using this approach saves a considerable number of gates and decreases the bus load while increasing the latency of the standard binary multiplier unit only marginally. Finally, a solution of a combined 17x17 integer / GF(2 m8 ) multiplier is presented and discussed.
A Binary Redundant Scalar Point Multiplication in Secure Elliptic Curve Cryptosystems Abstract
, 2005
"... The main backbone operation in elliptic curve cryptosystems is scalar point multiplication. The most frequently used method implementing the scalar point multiplication which is performed in the top level of GF (Galois Field) multiplication and GF division, has been the doubleandadd algorithm, whi ..."
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The main backbone operation in elliptic curve cryptosystems is scalar point multiplication. The most frequently used method implementing the scalar point multiplication which is performed in the top level of GF (Galois Field) multiplication and GF division, has been the doubleandadd algorithm, which is being recently challenged by NAF (NonAdjacent Format) algorithm. In this paper, we propose a more efficient and novel approach of a scalar point multiplication method than existing doubleandadd by applying redundant recoding which originates from radix4 Booth’s algorithm. We call the novel algorithm quadandadd. Along with the algorithm, we have created a new EC (Elliptic Curve) point operation, named point quadruple, and verified with calculations of a realworld application to utilize it. Derived numerical expressions were verified using both C programs and HDL (Hardware Description Language). Proposed method of EC scalar point multiplication can be utilized in many EC security applications for handling efficient and fast calculations.