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27
Handbook of Applied Cryptography
, 1997
"... As we draw near to closing out the twentieth century, we see quite clearly that the informationprocessing and telecommunications revolutions now underway will continue vigorously into the twentyfirst. We interact and transact by directing flocks of digital packets towards each other through cybers ..."
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Cited by 2477 (30 self)
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As we draw near to closing out the twentieth century, we see quite clearly that the informationprocessing and telecommunications revolutions now underway will continue vigorously into the twentyfirst. We interact and transact by directing flocks of digital packets towards each other through cyberspace, carrying love notes, digital cash, and secret corporate documents. Our personal and economic lives rely more and more on our ability to let such ethereal carrier pigeons mediate at a distance what we used to do with facetoface meetings, paper documents, and a firm handshake. Unfortunately, the technical wizardry enabling remote collaborations is founded on broadcasting everything as sequences of zeros and ones that one's own dog wouldn't recognize. What is to distinguish a digital dollar when it is as easily reproducible as the spoken word? How do we converse privately when every syllable is bounced off a satellite and smeared over an entire continent? How should a bank know that it really is Bill Gates requesting from his laptop in Fiji a transfer of $10,000,000,000 to another bank? Fortunately, the magical mathematics of cryptography can help. Cryptography provides techniques for keeping information secret, for determining that information
On the Periods of Generalized Fibonacci Recurrences
, 1992
"... We give a simple condition for a linear recurrence (mod 2 w ) of degree r to have the maximal possible period 2 w 1 (2 r 1). It follows that the period is maximal in the cases of interest for pseudorandom number generation, i.e. for 3term linear recurrences dened by trinomials which are prim ..."
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Cited by 28 (10 self)
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We give a simple condition for a linear recurrence (mod 2 w ) of degree r to have the maximal possible period 2 w 1 (2 r 1). It follows that the period is maximal in the cases of interest for pseudorandom number generation, i.e. for 3term linear recurrences dened by trinomials which are primitive (mod 2) and of degree r > 2. We consider the enumeration of certain exceptional polynomials which do not give maximal period, and list all such polynomials of degree less than 15. 1.
Uniform Random Number Generators for Supercomputers
 Proc. Fifth Australian Supercomputer Conference
, 1992
"... We consider the requirements for uniform pseudorandom number generators on modern vector and parallel supercomputers, consider the pros and cons of various classes of methods, and outline what is currently available. We propose a class of random number generators which have good statistical propert ..."
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Cited by 26 (11 self)
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We consider the requirements for uniform pseudorandom number generators on modern vector and parallel supercomputers, consider the pros and cons of various classes of methods, and outline what is currently available. We propose a class of random number generators which have good statistical properties and can be implemented efficiently on vector processors and parallel machines. A good method for initialization of these generators is described, and an implementation on a Fujitsu VP 2200/10 vector processor is discussed. 1
Random Number Generators for Parallel Computers
 The NHSE Review
, 1997
"... Random number generators are used in many applications, from slot machines to simulations of nuclear reactors. For many computational science applications, such as Monte Carlo simulation, it is crucial that the generators have good randomness properties. This is particularly true for largescale ..."
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Cited by 24 (1 self)
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Random number generators are used in many applications, from slot machines to simulations of nuclear reactors. For many computational science applications, such as Monte Carlo simulation, it is crucial that the generators have good randomness properties. This is particularly true for largescale simulations done on highperformance parallel computers. Good random number generators are hard to find, and many widelyused techniques have been shown to be inadequate. Finding highquality, efficient algorithms for random number generation on parallel computers is even more difficult. Here we present a review of the most commonlyused random number generators for parallel computers, and evaluate each generator based on theoretical knowledge and empirical tests. In conclusion, we provide recommendations for using random number generators on parallel computers. Outline This review is organized as follows: A brief summary of the findings of this review is first presented, giving an overview of the use of parallel random number generators and a list of recommended algorithms. Section 1 is an introduction to random number generators and their use in computer simulations on parallel computers. Section 2 is a summary of the methods used to test and evaluate random number generators, on both sequential and parallel computers. Section 3 gives an overview of the main algorithms used to implement random number generators on sequential computers, provides examples of software implementations of the algorithms, and states any known problems with the algorithms or implementations. Section 4 gives a description of the most common methods used to parallelize the sequential algorithms, provides examples of software implementing these algorithms, and states any known problems ...
Efficient GF(p m) Arithmetic Architectures for Cryptographic Applications
 IN TOPICS IN CRYPTOLOGY  CT RSA 2003
, 2003
"... Recently, there has been a lot of interest on cryptographic applications based on fields OF(p"), for p > 2. This contribution presents OF(p TM) multipliers architectures, where p is odd. We present designs which trade area for performance based on the number of coefficients that the multiplier proce ..."
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Cited by 14 (2 self)
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Recently, there has been a lot of interest on cryptographic applications based on fields OF(p"), for p > 2. This contribution presents OF(p TM) multipliers architectures, where p is odd. We present designs which trade area for performance based on the number of coefficients that the multiplier processes at one time. Families of irreducible polynomials are introduced to reduce the complexity of the modulo reduction operation and, thus, improved the efficiency of the multiplier. We, then, specialize to fields OF(3 TM) and provide the first cubing architecture pre sented in the literature. We synthesize our architectures for the special case of OF(397) on the XCV10008FG1156 and XC2VP207FF1156 FPGAs and provide area/performance numbers and comparisons to previous OF(3 TM) and OF(2 TM) implementations. Finally, we provide tables of irreducible polynomials over OF(3) of degree m with 2 _< m _< 255.
Elliptic & hyperelliptic curves on embedded µp
 ACM Transactions in Embedded Computing Systems (TECS), 2003. Special Issue on Embedded Systems and Security
"... To appear in the special issue on Embedded Systems and Security of the ..."
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Cited by 10 (4 self)
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To appear in the special issue on Embedded Systems and Security of the
A fast algorithm for testing irreducibility of trinomials mod 2
 pub199.html
, 2000
"... The standard algorithm for testing reducibility of a trinomial of prime degree r over GF(2) requires 2r+O(1) bits of memory and Θ(r 2) bitoperations. We describe an algorithm which requires only 3r/2 + O(1) bits of memory and significantly fewer bitoperations than the standard algorithm. Using the ..."
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Cited by 9 (7 self)
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The standard algorithm for testing reducibility of a trinomial of prime degree r over GF(2) requires 2r+O(1) bits of memory and Θ(r 2) bitoperations. We describe an algorithm which requires only 3r/2 + O(1) bits of memory and significantly fewer bitoperations than the standard algorithm. Using the algorithm, we have found 18 new irreducible trinomials of degree r in the range 100151 ≤ r ≤ 700057. If r is a Mersenne exponent (i.e. 2 r −1 is a Mersenne prime), then an irreducible trinomial is primitive. Primitive trinomials are of interest because they can be used to give pseudorandom number generators with period at least 2 r − 1. We give examples of primitive trinomials for r = 756839, 859433, and 3021377. The three results for r = 756839 are new. The results for r = 859433 extend and correct some computations of Kumada et al. [Math. Comp. 69 (2000), 811–814]. The two results for r = 3021377 are primitive trinomials of the highest known degree. 1 Copyright c○2000, the authors. rpb199tr typeset using L ATEX 1 1
Uniform Random Number Generators for Vector and Parallel Computers
 REVISION APPEARED IN PROC. FIFTH AUSTRALIAN SUPERCOMPUTER CONFERENCE
, 1992
"... We consider the requirements for uniform pseudorandom number generators on modern vector and parallel machines; consider the pros and cons of various popular classes of methods and some new methods; and outline what is currently available. We then make a proposal for a class of random number gen ..."
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Cited by 8 (1 self)
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We consider the requirements for uniform pseudorandom number generators on modern vector and parallel machines; consider the pros and cons of various popular classes of methods and some new methods; and outline what is currently available. We then make a proposal for a class of random number generators which have good statistical properties and can be implemented efficiently on vector processors and parallel machines. A proposal regarding initialization of these generators is made. We also discuss the results of a trial implementation on a Fujitsu VP 2200/10 vector processor.
Maximal and NearMaximal Shift Register Sequences: Efficient Event Counters and Easy Discrete Logarithms
 IEEE Transactions on Computers
, 1994
"... A Linear Feedback Shift Register, or LFSR, can implement an event counter by shifting whenever an event occurs. A single twoinput exclusiveOR gate is often the only additional hardware necessary to allow a shift register to generate, by successive shifts, all of its possible nonzero values. The co ..."
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Cited by 6 (0 self)
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A Linear Feedback Shift Register, or LFSR, can implement an event counter by shifting whenever an event occurs. A single twoinput exclusiveOR gate is often the only additional hardware necessary to allow a shift register to generate, by successive shifts, all of its possible nonzero values. The counting application requires that the number of shifts be recoverable from the LFSR contents so that further processing and analysis may be done. Recovering this number from the shift register value corresponds to a problem from number theory and cryptography known as the discrete logarithm. For some sizes of shift register, the maximallength LFSR implementation requires more than a single gate, and for some the discrete logarithm calculation is hard. This paper proposes for such sizes the use of certain onegate LFSRs whose sequence lengths are nearly maximal, and which support easy discrete logarithms. These LFSRs have a concise mathematical characterization, and are quite common. The pape...
Efficient Hardware Implementation of Finite Fields with Applications to Cryptography
 ACTA APPL MATH (2006 ) 93 : 75–118
, 2006
"... The paper presents a survey of most common hardware architectures for finite field arithmetic especially suitable for cryptographic applications. We discuss architectures for three types of finite fields and their special versions popularly used in cryptography: binary fields, prime fields and exten ..."
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Cited by 5 (0 self)
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The paper presents a survey of most common hardware architectures for finite field arithmetic especially suitable for cryptographic applications. We discuss architectures for three types of finite fields and their special versions popularly used in cryptography: binary fields, prime fields and extension fields. We summarize algorithms and hardware architectures for finite field multiplication, squaring, addition/subtraction, and inversion for each of these fields. Since implementations in hardware can either focus on highspeed or on areatime efficiency, a careful choice of the appropriate set of architectures has to be made depending on the performance requirements and available area.