The Optical Transpose Interconnection System (OTIS) proposed in [14] makes use of free-space optical interconnects to augment an electronic system with non-local interconnections. In this paper, we show how these connections can be used to implement a large-scale system with a given network topology using small copies of a similar topology. In particular, we show that, using OTIS, an N 2 node 4-D mesh can be constructed from N copies of the N-node 2-D mesh, an N 2 node hypercube can be constructed from N copies of the N-node hypercube, and an (N 2 ; ff 2 ; c=2) expander can be constructed from N copies of an (N; ff; c) expanders, all with small slowdown. We also show how this expander construction can be used to build multibutterfly networks in a scalable fashion. Finally, we demonstrate how the OTIS connections can be used to produce a bit-parallel crossbar using many copies of bit-serial crossbars with minimal overhead. 1 Introduction In principle, optical interconnect tec...

Technologies now exist for implementing dense surface-normal optical interconnections for silicon CMOS VLSI using hybrid integration techniques. The critical factors in determining the performance of the resulting photonic chip are the yield on the transceiver device arrays, the sensitivity and power dissipation of the receiver and transmitter circuits, and the total optical power budget available. The use of GaAs--AlGaAs multiple-quantum-well p-i-n diodes for on-chip detection and modulation is one effective means of implementing the optoelectronic transceivers. We discuss a potential roadmap for the scaling of this hybrid optoelectronic VLSI technology as CMOS linewidths shrink and the characteristics of the hybrid optoelectronic tranceiver technology improve. An important general conclusion is that, unlike electrical interconnects, such dense optical interconnections directly to an electronic circuit will likely be able to scale in capacity to match the improved performance of futur...

In this paper we develop algorithms for some basic operations - broadcast, window broadcast, prefix sum, data sum, rank, shift, data accumulation, consecutive sum, adjacent sum, concentrate, distribute, generalize, sorting, random access read and write - on the OTIS-Mesh [1] model. These operations are useful in the development of efficient algorithms for numerous applications [2].

We show that the diameter of an N² processor 0TIS-Mesh is 4vf - 3. Two possible embedclings of an N × N mesh onto an 0TIS-Mesh are evaluated. 0TIS-Mesh algorithms for some commonly performed permutations - transpose, bit reversal, vector reversal, perfect shuffle, unshuffle, shuffled row-major, and bit shuffle - are developed. We also propose an algorithm for general BPC permutations.

We develop algorithms for histogramming, histogram modification, Hough transform, and image shrinking and expanding on an OTIS-Mesh optoelectronic computer. Our algorithm for the Hough transform is based upon a mesh algorithm for the Hough transform which is also developed in this paper. This new mesh algorithm improves upon the mesh Hough transform algorithms of [4] and [14].

We develop algorithms to multiply two vectors, a vector and a matrix, and two matrices on an OTIS-Mesh optoelectronic computer. Two mappings, group row and group submesh [25], of a matrix onto an OTIS-Mesh are considered and the relative merits of each compared. We show that our algorithms to multiply a column and row vector use an optimal number of data moves for both the group row and group submesh mappings; our algorithm to multiply a row vector and a column vector is optimal for the group row mapping; and our algorithm to multiply a matrix by a column vector is optimal for the group row mapping.

this paper, we study the OTIS-Hypercube architecture and obtain basic properties and basic permutation routing algorithms for this architecture. These algorithms can be used to develop efficient application programs

This paper briefly reviews some of the more popular parallel-computer models--pipelined optical bus, optical transpose interconnect system (OTIS), and partitioned optical passive stars (POPS) network--that employ optical interconnect. The interconnect topology and some simple algorithms for each model are also described.

We present the theory, experimental results, and analytical modeling of high-speed CMOS switches, with a 2-D layout, suitable for the implementation of packet-switched free-space optoelectronic Multistage Interconnection Networks (MINs). These switches are fully connected, bi-directional, and scaleable. The first design is a proof of concept of the half-switch, which is a two-to-one multiplexer, and the 2-D layout. The second design introduces a novel self-routing concept, with contention detection and packet drop-and-resend capabilities. It uses three-valued logic, with 2.5V being the third value for a 5V power supply. Simulations show that for a 0.8 µm CMOS technology the switches can operate at speeds up to 250 Mbits/sec. Scaled-down versions of both designs have been successfully implemented in 2.0 µm CMOS. The analytical modeling of the switches show that large scale free-space optoelectronic MINs using this concept could offer close to Terabit/sec throughput capabilities and ver...

Analog Fourier optical processing systems can perform important classes of signal processing operations in parallel, but suffer from limited accuracy. Digital–optical equivalents of such systems could be built that share many features of the analog systems while allowing greater accuracy. We show that the digital equivalent of any system consisting of an arbitrary number of lenses, filters, spatial light modulators, and sections of free space can be constructed. There are many possible applications for such systems as well as many alternative technologies for constructing them; this paper stresses the potential of free-space interconnected active-device-plane-based optoelectronic architectures as a digital signal processing environment. Implementation of the active-device planes through hybridization of optoelectronic components with silicon electronics should allow the realization of systems whose performance exceeds that of purely electronic systems. r 1996 Optical Society of America 1.