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29
Designing Arithmetic Circuits by Refinement in Ruby
 In Proc. Second International Conference on Mathematics of Program Construction, Lecture Notes in Computer Science
, 1992
"... . This paper presents in some detail the systematic derivation of a static bitlevel parallel algorithm to implement multiplication of integers, that is to say one which might be implemented as an electronic circuit. The circuit is well known, but the derivation shows that its design can be seen as ..."
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Cited by 26 (0 self)
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. This paper presents in some detail the systematic derivation of a static bitlevel parallel algorithm to implement multiplication of integers, that is to say one which might be implemented as an electronic circuit. The circuit is well known, but the derivation shows that its design can be seen as the consequence of decisions made (and explained) in terms of the abstract algorithm. The systematic derivation serves both as an explanation of the circuit, and as a demonstration that it is correct `by construction'. We believe that the technique is applicable to a wide range of similar algorithms. 1 Introduction We advocate a style of `design by calculation' for the very finegrained parallel algorithms that are implemented as regular arrays of electronic circuits. The design of such circuits is particularly difficult because the implementation medium imposes severe constraints on what is possible and what is reasonably efficient. In consequence the details of the final implementation ha...
Collecting Butterflies
 Proc. 4th Banff Workshop on Higher Order, Springer Workshops in Computing
, 1991
"... This paper attempts to explain why this should be, and what butterfly networks are, using a new and elegant formulation based on a language of relations. Most of the material covered by this paper has appeared in a less tractable form in earlier papers [16, 17]. The novelty here is in the simplicity ..."
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Cited by 16 (3 self)
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This paper attempts to explain why this should be, and what butterfly networks are, using a new and elegant formulation based on a language of relations. Most of the material covered by this paper has appeared in a less tractable form in earlier papers [16, 17]. The novelty here is in the simplicity and elegance of the presentation, which derives from an appropriate choice of highlevel structures. These structures are represented by functions which are used to compose circuits from components, and are chosen to have simple mathematical properties. This presentation makes it easier to explain how the design comes about, showing that butterflies are natural implementations of divideandconquer algorithms. We are then able to go on to explain many of the properties of butterfly networks, and of their implementations. A language of relations
Using Reconfigurable Hardware to Speed up Product Development and Performance.
, 1994
"... HARP1 is a circuit board designed to exploit the rigorous compilation of parallel algorithms directly into hardware. It includes a transputer closely coupled to a FieldProgrammable Gate Array (FPGA). The whole system may be regarded as an instance of a process in the sense of the theory of Communi ..."
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Cited by 13 (5 self)
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HARP1 is a circuit board designed to exploit the rigorous compilation of parallel algorithms directly into hardware. It includes a transputer closely coupled to a FieldProgrammable Gate Array (FPGA). The whole system may be regarded as an instance of a process in the sense of the theory of Communicating Sequential Processes (CSP). And the major elements are also naturally viewed in the same way: both can implement many parallel communicating subprocesses. HARP1 is being used as part of a joint project between Oxford Parallel and Sharp Laboratories of Europe within the Parallel Applications Programme supported by DTI/SERC. Here it is the target of mathematical tools based upon Ruby and occam which enable unusual and novel applications to be produced and demonstrated correctly and rapidly. The design includes memory banks, a programmable frequency synthesizer and a several communication ports. The latter supports the use of parallel arrays of HARP1 boards, as well as interfacing to ...
Towards a Declarative Framework for HardwareSoftware Codesign
 in Proc. Third International Workshop on Hardware/Software Codesign, IEEE Computer
, 1994
"... We present an experimental framework for mapping declarative programs, written in a language known as Ruby, into various combinations of hardware and software. Strategies for parametrised partitioning into hardware and software can be captured concisely in this framework, and their validity can be c ..."
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Cited by 13 (4 self)
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We present an experimental framework for mapping declarative programs, written in a language known as Ruby, into various combinations of hardware and software. Strategies for parametrised partitioning into hardware and software can be captured concisely in this framework, and their validity can be checked using algebraic reasoning. The method has been used to guide the development of prototype compilers capable of producing, from a Ruby expression, a variety of implementations involving fieldprogrammable gate arrays (FPGAs) and microprocessors. The viability of this approach is illustrated using a number of examples for two reconfigurable systems, one containing an array of Algotronix devices and a PC host, and the other containing a transputer and a Xilinx device. 1 Introduction Although it has been known for many years that, from a functional point of view, there is little distinction between hardware and software, in current practice they are mostly developed using very different m...
Systematic Serialisation of ArrayBased Architectures
 Integration, the VLSI Journal
, 1993
"... This paper describes the use of Ruby, a language of functions and relations, to develop serialised implementations of arraybased architectures. Our Ruby expressions contain parameters which can be varied to produce a wide range of designs with different spacetime tradeoffs. Such expressions can b ..."
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Cited by 12 (6 self)
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This paper describes the use of Ruby, a language of functions and relations, to develop serialised implementations of arraybased architectures. Our Ruby expressions contain parameters which can be varied to produce a wide range of designs with different spacetime tradeoffs. Such expressions can be obtained by applying correctnesspreserving transformations to an initial simple description. This approach provides a unified treatment of serialisation schemes similar to LPGS (Locally Parallel Globally Sequential) and LSGP (Locally Sequential Globally Parallel) partitioning methods, and will be illustrated by the development of a variety of circuits for convolution. Keywords: Ruby, parametrised design, serialisation, correctnesspreserving transformations, systolic arrays. 1 Introduction An attraction of arraybased architectures, such as systolic networks, is the opportunity for customising them to cater for a specific application. One way of achieving customisation is to start from ...
A Formal Semantics of Data Flow Diagrams
 Formal Aspects of Computing
, 1994
"... This document presents a full version of the formal semantics of data ow diagrams reported in [Larsen&93]. Data Flow Diagrams are used in Structured Analysis and are based on an abstract model for data flow transformations. The semantics consists of a collection of VDM functions, transforming an ..."
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Cited by 12 (1 self)
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This document presents a full version of the formal semantics of data ow diagrams reported in [Larsen&93]. Data Flow Diagrams are used in Structured Analysis and are based on an abstract model for data flow transformations. The semantics consists of a collection of VDM functions, transforming an abstract syntax representation of a data flow diagram into an abstract syntax representation of a VDM specification. Since this transformation is executable, it becomes possible to provide a software analyst/designer with two `views' of the system being modeled: a graphical view in terms of a data flow diagram, and a textual view in terms of a VDM specification. The specification presented in this document have been processed by The IFAD VDMSL Toolbox [Lassen93] and the LATEX output is produced directly by means of this tool. The complete transformation has been syntaxchecked, typechecked and tested using the IFAD VDMSL Toolbox [Lassen93]; this has given us confidence that the transformation...
Binomial Filters
 Journal of VLSI Signal Processing
, 1996
"... . Binomial filters are simple and efficient structures based on the binomial coefficients for implementing Gaussian filtering. They do not require multipliers and can therefore be implemented efficiently in programmable hardware. There are many possible variations of the basic binomial filter struct ..."
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Cited by 10 (4 self)
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. Binomial filters are simple and efficient structures based on the binomial coefficients for implementing Gaussian filtering. They do not require multipliers and can therefore be implemented efficiently in programmable hardware. There are many possible variations of the basic binomial filter structure, and they provide a wide range of spacetime tradeoffs; a number of these designs have been captured in a parametrised form and their features are compared. This technique can be used for multidimensional filtering, provided that the filter is separable. The numerical performance of binomial filters, and their implementation using fieldprogrammable devices for an image processing application, are also discussed. Keywords: Gaussian filters, binomial filters, parametrised design, fieldprogrammable devices. 1. Introduction Gaussian filtering is probably the most common form of linear filtering. To overcome the problem of choosing filter coefficients against a set of conflicting constr...
LowLevel Programming in Hume: an Exploration of the HWHume Level
 IFL 2006: INTL SYMPOSIUM ON IMPLEMENTATIONS AND APPLICATIONS OF FUNCTIONAL LANGUAGES
, 2007
"... This paper describes the HWHume level of the novel Hume language. HWHume is the simplest subset of Hume that we have identified. It provides strong formal properties but posseses limited abstraction capabilities. In this paper, we introduce HWHume, show some simple example programs, describe an e ..."
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Cited by 8 (8 self)
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This paper describes the HWHume level of the novel Hume language. HWHume is the simplest subset of Hume that we have identified. It provides strong formal properties but posseses limited abstraction capabilities. In this paper, we introduce HWHume, show some simple example programs, describe an eĆcient software implementation, and demonstrate how important properties can be exposed as part of an integrated formallybased verification approach.
Lineartime breadthfirst tree algorithms An exercise in the arithmetic of folds and zips
 Dept of Computer Science, University of Auckland
, 1992
"... This is a paper about an application of the mathematics of zip, fold (reduce) and accumulate (scan) operations on lists. It gives an account of the derivation of a lineartime breadthfirst enumeration function, and of a subtle and efficient breadthfirst tree labelling function. 1 Breadthfirst ord ..."
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Cited by 7 (1 self)
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This is a paper about an application of the mathematics of zip, fold (reduce) and accumulate (scan) operations on lists. It gives an account of the derivation of a lineartime breadthfirst enumeration function, and of a subtle and efficient breadthfirst tree labelling function. 1 Breadthfirst ordering The algorithms which are developed in this paper relate trees to lists in a way that respects `breadthfirst' ordering on the nodes of a tree. This is the order in which nodes nearer the root are considered to be earlier and  perhaps arbitrarily, but for definiteness  those at the same depth from the root are ordered lexicographically by the the `left to right' seniority of their line of descent. This paper works with rose trees, in which each node has an arbitrary finite number of immediate descendants tree ff = = ta where ta ::= Nd ff [ta] root(Nd a ts) = a subs(Nd a ts) = ts and will develop implementations of the breadthfirst scanning and labelling functions bfs and lab b...