Parametric faults are a significant cause of incorrect operation in analog circuits. Many design for test techniques for analog circuits are ineffective at detecting multiple parametric faults because either their accuracy is poor, or the circuit is not tested in the configuration in which it is used. We present a design for test (DFT) scheme that offers the accuracy needed to test high-quality circuits. The DFT scheme is based on a circuit that digitally measures the ratio of a pair of capacitors. The circuit is used to characterize the transfer function of a switched capacitor circuit, which is usually determined by capacitor ratios. In our DFT scheme, capacitor ratios can be measured to within 0.01% accuracy and filter parameters can be shown to be satisfied to within 0.1% accuracy. With this characterization process, a filter can be directly shown to satisfy all specifications that depend on capacitor ratios. We believe the accuracy of our approach is at least an order of magnitude...

Abstract—Extended-counting analog-to-digital conversion combines the accuracy of 61 modulation with the speed of algorithmic conversion. In this paper, a double-sampling technique is introduced for this type of converter. It is based on a variant of the fully floating bilinear integrator. This way, the clock frequency of the converter is almost halved. An experimental converter was designed in a 0.6- m CMOS technology for a bandwidth of 500 kHz at a 3.3-V supply. In the switched-capacitor implementation, the hardware is extensively reused. This way, the converter can be realized with only one operational amplifier. On the other hand, compared to alternative implementations, the amount of switches is increased. These are designed carefully in order not to degrade the performance. The converter converts a sample in 24 clock cycles and achieves a dynamic range of 87 dB. The peak signal-to-noise ratio (SNR) and signal-to-noise-plus-distortion ratio (SNDR) were measured to be 82 and 81 dB, respectively. The power consumption was 28-mW analog and 20-mW digital. The converter core occupies 0.7 mmP including digital logic. Index Terms—Analog-to-digital conversion, double sampling, extended counting. I.

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