Integer division on modern processors is expensive compared to multiplication. Previous algorithms for performing unsigned division by an invariant divisor, via reciprocal approximation, suffer in the worst case from a common requirement for n+1 bit multiplication, which typically must

architecture. Most also require that the upper half of an integer product be quickly accessible. We treat unsigned division, signed division where the quotient rounds towards zero, signed division where the quotient rounds towards -#, and division where the result is known a priori to be exact. We give some

This paper proposes several approximate divider designs; two different levels of approximation (cell and array levels) are investigated for non-restoring division. Three approximate subtractor cells are proposed and designed for the basic subtraction; these cells mitigate accuracy in subtraction

to be of interest. We consider typical architectures based on two's complement binary arithmetic and present various methods of performing single precision unsigned integer division in software. In addition to methods based on the standard test-subtract-shift approach, we present a method and variants based

the reciprocal, however, the quotient obtained often suffers from offby -one errors, requiring a correction step. This paper describes the design decisions we made when architecting integer division for a new 64 bit machine. The result is a fast and economical scheme for computing both unsigned and signed

Abstract-This paper considers the problem of dividing a two-word integer by a single-word integer, together with a few extensions and applications. Due to lack of efficient division instructions in current processors, the division is performed as a multiplication using a precomputed single

Abstract—This paper considers the problem of dividing a two-word integer by a single-word integer, together with a few extensions and applications. Due to lack of efficient division instructions in current processors, the division is performed as a multiplication using a precomputed single

. The modifications are to eliminate the integer multiplication and to round the unsigned result to the nearest integer. The comparison results of the outputs between C++ and Verilog codes are used to verify the accuracy of the division process. Verilog code needs to be changed for any incorrect results. The required

We present a complete analysis of the integer division of a single unsigned dividend word by a single unsigned divisor word based on double-word multiplication of the dividend by an inverse of the divisor. The well-known advantage of this method yields run-time efficiency, if the inverse

A very simple multiplier cell is developed for use in a linear, purely systolic array forming a digit-serial multiplier for unsigned or 2'complement operands. Each cell produces two digit-product terms and accumulates these into a previous sum of the same weight, developing the product least