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Subthreshold Leakage Modeling and Reduction Techniques

by James Kao, Siva Narendra, Anantha Chandrakasan, Anantha Ch, Isubthreshold I S - In Proc. ICCAD, 2002 , 2002
"... As technology scales, subthreshold leakage currents grow exponentially and become an increasingly large component of total power disscation. CAD tools to help model and manage subthreshold leakage currents will be needed for developing ultra low power and high performance integrated circuits. This p ..."
Abstract - Cited by 55 (0 self) - Add to MetaCart
As technology scales, subthreshold leakage currents grow exponentially and become an increasingly large component of total power disscation. CAD tools to help model and manage subthreshold leakage currents will be needed for developing ultra low power and high performance integrated circuits

Gate Direct Leakage Subthreshold Leakage

by R. Tanabe, H. Anzai, Y. Ashizawa, H. Oka
"... As CMOS technology is advanced in recent years, the operation of SRAM becomes critical issue for further scaling. It is crucial for realizing the SRAM to keep static noise margin (SNM) and write margin (WM) large enough to get stability and overcome random dopant and process fluctuations. Also, supp ..."
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, suppression of leakage current is another key issue. The major sources of leakage current are the gate direct tunneling current, the sub-threshold leakage and the reverse biased band-to-band-tunneling junction leakage. To reduce total chip power, these leakage components must be suppressed. In this paper, we

Analysis of Subthreshold Leakage Reduction in CMOS Digital Circuits

by unknown authors
"... Abstract — Leakage power dissipation has become a sizable proportion of the total power dissipation in an integrated circuit and is projected to grow exponentially during the next decade according to the International Technology Roadmap for Semiconductors (ITRS). This directly affects portable batte ..."
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battery operated devices such as cellular phones and PDAs since they have long idle times. To curtail this static power loss, several techniques have been proposed that efficiently minimize leakage power dissipation. A comprehensive survey and analysis of various subthreshold leakage power reduction

Statistical analysis of subthreshold leakage current for VLSI circuits

by Rajeev Rao, Student Member, Ashish Srivastava, Student Member, David Blaauw, Dennis Sylvester - Ieee Transactions on Very Large Scale Integration (Vlsi) Systems , 2004
"... Abstract—We develop a method to estimate the variation of leakage current due to both intra-die and inter-die gate length process variability. We derive an analytical expression to estimate the probability density function (PDF) of the leakage current for stacked devices found in CMOS gates. These d ..."
Abstract - Cited by 39 (2 self) - Add to MetaCart
Abstract—We develop a method to estimate the variation of leakage current due to both intra-die and inter-die gate length process variability. We derive an analytical expression to estimate the probability density function (PDF) of the leakage current for stacked devices found in CMOS gates

FAULT DIAGNOSIS OF SUBTHRESHOLD LEAKAGE CURRENT DEFECTS IN DRAM

by K. Manju Priya, S. Malini
"... error Detection (SSD). The minimum feature size of dynamic RAM has been down-scaled, so several studies have been carried out to determine ways to protect cell data from leakage current in many areas. Due to leakage sources, permanent error occurs. Many permanent faults are a result of manufacturing ..."
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error Detection (SSD). The minimum feature size of dynamic RAM has been down-scaled, so several studies have been carried out to determine ways to protect cell data from leakage current in many areas. Due to leakage sources, permanent error occurs. Many permanent faults are a result

Modeling Subthreshold Leakage Current in General Transistor Networks

by Paulo F Butzen , André I Reis , Chris H Kim , Renato P Ribas
"... Abstract ..."
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Abstract not found

NODE VOLTAGE DEPENDENT SUBTHRESHOLD LEAKAGE CURRENT CHARACTERISTICS OF DYNAMIC CIRCUITS

by unknown authors
"... Abstract – The subthreshold leakage current characteristics of domino logic circuits is evaluated in this paper. The strong dependence of the subthreshold leakage current on the node voltages is discussed. In a standard low threshold voltage domino logic circuit with stacked pulldown devices, a char ..."
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Abstract – The subthreshold leakage current characteristics of domino logic circuits is evaluated in this paper. The strong dependence of the subthreshold leakage current on the node voltages is discussed. In a standard low threshold voltage domino logic circuit with stacked pulldown devices, a

NODE VOLTAGE DEPENDENT SUBTHRESHOLD LEAKAGE CURRENT CHARACTERISTICS OF DYNAMIC CIRCUITS

by unknown authors
"... Abstract – The subthreshold leakage current characteristics of domino logic circuits is evaluated in this paper. The strong dependence of the subthreshold leakage current on the node voltages is discussed. In a standard low threshold voltage domino logic circuit with stacked pulldown devices, a char ..."
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Abstract – The subthreshold leakage current characteristics of domino logic circuits is evaluated in this paper. The strong dependence of the subthreshold leakage current on the node voltages is discussed. In a standard low threshold voltage domino logic circuit with stacked pulldown devices, a

Enabling Sub-nW RF Circuits through Subthreshold Leakage Management

by Patrick P Mercier , Saurav Bandropadhyay , Anantha P Chandrakasan
"... Abstract -This paper presents subthreshold leakage management techniques to enable the design of a 2.4 GHz RF transmitter with ultra-low average power. Careful device size optimizations and judicious use of power gating devices shows that leakage power of the radio can be reduced by upwards of 4000 ..."
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Abstract -This paper presents subthreshold leakage management techniques to enable the design of a 2.4 GHz RF transmitter with ultra-low average power. Careful device size optimizations and judicious use of power gating devices shows that leakage power of the radio can be reduced by upwards

Subthreshold Leakage Modeling and Estimation of General CMOS Complex Gates

by Author1 , Author2 , Local
"... Abstract. A new subthreshold leakage model is proposed in order to improve the static power estimation in general CMOS complex gates. Series-parallel transistor arrangements with more than two logic depth, as well as non-seriesparallel off-switch networks are covered by such analytical modeling. Th ..."
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Abstract. A new subthreshold leakage model is proposed in order to improve the static power estimation in general CMOS complex gates. Series-parallel transistor arrangements with more than two logic depth, as well as non-seriesparallel off-switch networks are covered by such analytical modeling
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