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A sampling microarchitecture simulator for Java workloads
- in Proceedings of TIMERS-1 held in conjunction with IEEE ISPASS’08
"... Abstract—JavaTMhas found widespread adoption across a va-riety of architectures. Understanding Java application behavior and further design and development of Java systems can be facil-itated by software based microarchitecture simulators. However, the use of cycle-accurate, user-mode, software micr ..."
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Cited by 2 (2 self)
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Abstract—JavaTMhas found widespread adoption across a va-riety of architectures. Understanding Java application behavior and further design and development of Java systems can be facil-itated by software based microarchitecture simulators. However, the use of cycle-accurate, user-mode, software
Reverse State Reconstruction for Sampled Microarchitectural Simulation
- IEEE ISPASS (San Jose, CA
, 2007
"... For simulation, a tradeoff exists between speed and accuracy. The more instructions simulated from the workload, the more accurate the results — but at a higher cost. To reduce processor simulation times, a variety of techniques have been introduced. Statistically sampled simulation is one method th ..."
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Cited by 3 (1 self)
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For simulation, a tradeoff exists between speed and accuracy. The more instructions simulated from the workload, the more accurate the results — but at a higher cost. To reduce processor simulation times, a variety of techniques have been introduced. Statistically sampled simulation is one method
Memory Reference Reuse Latency: Accelerated Sampled Microarchitecture Simulation
- In Proceedings of the 2003 IEEE International Symposium on Performance Analysis of Systems and Software
, 2002
"... This paper explores techniques for speeding up sampled microprocessor simulations by exploiting the observation that of the memory references that precede a sample, references that occur nearest to the sample are more likely to be germane during the sample itself. This means that accurately warming ..."
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Cited by 21 (0 self)
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This paper explores techniques for speeding up sampled microprocessor simulations by exploiting the observation that of the memory references that precede a sample, references that occur nearest to the sample are more likely to be germane during the sample itself. This means that accurately warming
Memory reference reuse latency: Accelerated warmup for sampled microarchitecture simulation
- In Proceedings of the International Symposium on Performance Analysis of Systems and Software
, 2003
"... Abstract — This paper proposes to speedup sampled microprocessor simulations by reducing warmup times without sacrificing simulation accuracy. It exploiting the observation that of the memory references that precede a sample cluster, references that occur nearest to the cluster are more likely to be ..."
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Cited by 7 (1 self)
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Abstract — This paper proposes to speedup sampled microprocessor simulations by reducing warmup times without sacrificing simulation accuracy. It exploiting the observation that of the memory references that precede a sample cluster, references that occur nearest to the cluster are more likely
Temperature-aware microarchitecture
- In Proceedings of the 30th Annual International Symposium on Computer Architecture
, 2003
"... With power density and hence cooling costs rising exponentially, processor packaging can no longer be designed for the worst case, and there is an urgent need for runtime processor-level techniques that can regulate operating temperature when the package’s capacity is exceeded. Evaluating such techn ..."
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Cited by 478 (52 self)
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. Validation was performed using finiteelement simulation. The paper also introduces several effective methods for dynamic thermal management (DTM): “temperaturetracking” frequency scaling, localized toggling, and migrating computation to spare hardware units. Modeling temperature at the microarchitecture
SMARTS: Accelerating Microarchitecture Simulation via Rigorous Statistical Sampling
- in Proceedings of the 30th annual international symposium on Computer architecture
, 2003
"... Current software-based microarchitecture simulators are many orders of magnitude slower than the hardware they simulate. Hence, most microarchitecture design studies draw their conclusions from drastically truncated benchmark simulations that are often inaccurate and misleading. This paper presents ..."
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Cited by 258 (25 self)
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the Sampling Microarchitecture Simulation (SMARTS) framework as an approach to enable fast and accurate performance measurements of full-length benchmarks. SMARTS accelerates simulation by selectively measuring in detail only an appropriate benchmark subset. SMARTS prescribes a statistically sound procedure
Discrete Choice Methods with Simulation
, 2002
"... This book describes the new generation of discrete choice meth-ods, focusing on the many advances that are made possible by simulation. Researchers use these statistical methods to examine the choices that consumers, households, firms, and other agents make. Each of the major models is covered: logi ..."
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Cited by 1326 (20 self)
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This book describes the new generation of discrete choice meth-ods, focusing on the many advances that are made possible by simulation. Researchers use these statistical methods to examine the choices that consumers, households, firms, and other agents make. Each of the major models is covered
On Sequential Monte Carlo Sampling Methods for Bayesian Filtering
- STATISTICS AND COMPUTING
, 2000
"... In this article, we present an overview of methods for sequential simulation from posterior distributions. These methods are of particular interest in Bayesian filtering for discrete time dynamic models that are typically nonlinear and non-Gaussian. A general importance sampling framework is develop ..."
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Cited by 1051 (76 self)
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In this article, we present an overview of methods for sequential simulation from posterior distributions. These methods are of particular interest in Bayesian filtering for discrete time dynamic models that are typically nonlinear and non-Gaussian. A general importance sampling framework
Incorporating non-local information into information extraction systems by Gibbs sampling
- IN ACL
, 2005
"... Most current statistical natural language processing models use only local features so as to permit dynamic programming in inference, but this makes them unable to fully account for the long distance structure that is prevalent in language use. We show how to solve this dilemma with Gibbs sampling, ..."
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Cited by 730 (25 self)
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Most current statistical natural language processing models use only local features so as to permit dynamic programming in inference, but this makes them unable to fully account for the long distance structure that is prevalent in language use. We show how to solve this dilemma with Gibbs sampling
Statistical sampling of microarchitecture simulation
- In 20th International Parallel and Distributed Processing Symposium (IPDPS
, 2006
"... Current software-based microarchitecture simulators are many orders of magnitude slower than the hardware they simulate. Hence, most microarchitecture design studies draw their conclusions from drastically truncated benchmark simulations that are often inaccurate and misleading. This article present ..."
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Cited by 9 (1 self)
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presents the Sampling Microarchitecture Simulation (SMARTS) framework as an approach to enable fast and accurate performance measurements of full-length benchmarks. SMARTS accelerates simulation by selectively measuring in detail only an appropriate benchmark subset. SMARTS prescribes a statistically sound
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