"... In PAGE 3: ...1 Mapping GPU to general purpose computing concepts To see how the GPU can be used to perform a general purpose computation, we consider an example in which we perform vector scaling using the Cg shading language. Table1 summarizes the GPU terms used in the example and how they map back to general purpose computing terms. To program the GPU one has to use a 3D library to interface with the graphics hardware and a shading language to program the GPU.... ..."

"... In PAGE 42: ...| Page 42 of 64 | July 2005 ADSP-BF536/BF537 Preliminary Technical Data General-Purpose Port Timing Table31 and Figure 23 describe general-purpose port operations. Table 31.... ..."

"... In PAGE 7: ... The common cases of gen- eral uni cation should be done quickly in-line and in- frequent cases passed to a general uni cation subrou- tine. Analysis of WAM execution ( Table5 ) indicates that about 70% of all general uni cations are simple bindings of an unbound variable with a nonvariable. These statistics motivate the switch-bind instruction (swb), a three-way branch based on the tags of two regis- ters.... In PAGE 12: ... Swb is used for uni cation of terms whose types are unknown at compile time. It takes care of 70% of these cases ( Table5 ), which gives an 0.6% execution time improvement (Table 8).... ..."

"... In PAGE 44: ...August 2, 1996 5.11 Summary Table26 summarizes the observed computational densities for the general-purpose archi- tecture classes reviewed in this section. Memories provide the highest programmable capacity of any of the devices reviewed.... ..."

"... In PAGE 13: ... Since the basic architecture of these systems is systolic in nature, we have devised a performance measure that is based on the number of million cell operations per second (MCOPS), where a cell is de ned as a PE in a hardware implementation or the equivalent block of instructions (basic inner loop) in a software implementation. Based on this measure, Table2 shows the performance of several general-purpose and special-purpose systems. The BioSCAN system, operating at clock rate of 32 MHz, performs a cell operation in each PE every 16 clock cycles for a theoretical processing rate of 2 MHz.... ..."

"... In PAGE 2: ... SGI has announced the MDMX (Mips Digital Media Extensions) for MIPS processors [6], and Alpha has announced a small set of MVI (Motion Video Instructions) for Alpha processors [6] specifically to accelerate MPEG-2 encoding. Table1 summarizes the instruction set features available in the first three multimedia extensions: MAX-2, VIS and MMX. Since published papers on MDMX and MVI are not readily available, these are not included.... In PAGE 2: ... The instruction mnemonics used are illustrative, rather than identical to those in the specific ISAs. Many features in Table1 will be described in the course of the paper. However, it is beyond the scope of this paper to describe all the memory instructions, and other features present in the base ISAs, which are particularly useful to media processing, although some of these are included in Table 1 for illustrative purposes.... In PAGE 2: ... Many features in Table 1 will be described in the course of the paper. However, it is beyond the scope of this paper to describe all the memory instructions, and other features present in the base ISAs, which are particularly useful to media processing, although some of these are included in Table1 for illustrative purposes. We first discuss subword parallelsim (section 2), the key feature common to these multimedia extensions, that provides the main performance acceleration.... ..."