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Minimum Energy CMOS Design with Dual Subthreshold Supply and Multiple Logic-Level Gates

by Kyungseok Kim, Vishwani D. Agrawal
"... Abstract—This paper presents a method for minimum energy digital CMOS circuit design using dual subthreshold supply voltages. Stringent energy budget and moderate speed requirements of some ultra low power systems may not be best satisfied just by scaling a single supply voltage. Optimized circuits ..."
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Abstract—This paper presents a method for minimum energy digital CMOS circuit design using dual subthreshold supply voltages. Stringent energy budget and moderate speed requirements of some ultra low power systems may not be best satisfied just by scaling a single supply voltage. Optimized circuits

Using Dual Sub-Threshold Supply Voltages

by A. Suvir Vikram, Mrs K. Srilakshmi, Mrs, Y. Syamala
"... Power dissipation in high performance systems requires more expensive packaging. In this situation, low power VLSI design has assumed great importance as an active and rapidly developing field. As the density and operating speed of CMOS VLSI chip increases, power dissipation becomes more significant ..."
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circuits. In this work, “Dual sub-threshold voltage supply” technique is used to operate the transistor under either OFF or ON state by applying some voltage at the gate of the MOS transistor. The designed circuits are simulated by using Mentor Graphics Backend Tool. With this technique, nearly 10

Dual-Threshold Design of Sub-threshold Circuits

by Jia Yao, Vishwani D. Agrawal
"... Abstract—Dual threshold voltage (Vth) design is a common method for reducing leakage power in above-threshold circuits. This research shows that it is also effective in reducing energy per cycle of sub-threshold circuits. We first study the single-Vth design theoretically and by simulations, and fin ..."
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Abstract—Dual threshold voltage (Vth) design is a common method for reducing leakage power in above-threshold circuits. This research shows that it is also effective in reducing energy per cycle of sub-threshold circuits. We first study the single-Vth design theoretically and by simulations

True Minimum Energy Design Using Dual Below-Threshold Supply Voltages

by Kyungseok Kim, Vishwani D. Agrawal - INTERNATIONAL CONFERENCE ON VLSI DESIGN , 2011
"... This paper investigates subthreshold voltage operation of digital circuits. The minimum energy per cycle operating point with a single voltage for this mode is known. We further lower the energy per cycle below that point by using dual subthreshold supplies. We call this the true minimum. Special co ..."
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This paper investigates subthreshold voltage operation of digital circuits. The minimum energy per cycle operating point with a single voltage for this mode is known. We further lower the energy per cycle below that point by using dual subthreshold supplies. We call this the true minimum. Special

Low Power Synthesis of Dual Threshold Voltage CMOS VLSI Circuits

by Vijay Sundararajan, Keshab K. Parhi , 1999
"... The use of dual threshold voltages can significantly reduce the static power dissipated in CMOS VLSI circuits. With the supply voltage at 1V and threshold voltage as low as 0.2V the subthreshold leakage power of transistors starts dominating the dynamic power. Also, many times a large number of devi ..."
Abstract - Cited by 49 (0 self) - Add to MetaCart
The use of dual threshold voltages can significantly reduce the static power dissipated in CMOS VLSI circuits. With the supply voltage at 1V and threshold voltage as low as 0.2V the subthreshold leakage power of transistors starts dominating the dynamic power. Also, many times a large number

Abstract Screening VDSM Outliers using Nominal and Subthreshold Supply Voltage IDDQ

by C. Schuermyer, B. Benware, K. Cota, R. Madge, R. Daasch, L. Ning
"... Very Deep Sub-Micron (VDSM) defects are resolved as Statistical Post-Processing ™ (SPP) outliers of a new IDDQ screen. The screen applies an IDDQ pattern once to the Device Under Test (DUT) and takes two quiescent current measurements. The quiescent current measurements are taken at nominal and at s ..."
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and at subthreshold supply voltages. The screen is demonstrated with 0.18µm and 0.13µm volume data. The screen's effectiveness is compared to stuck-at and other IDDQ screens. 1.

Minimizing Energy of Integer Unit by Higher Voltage Flip-Flop: VDDmin-Aware Dual Supply Voltage Technique

by Hiroshi Fuketa, Koji Hirairi, Tadashi Yasufuku, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai
"... Abstract — To achieve the most energy-efficient operation, this brief presents a circuit design technique for separating the power supply voltage (VDD) of flip-flops (FFs) from that of combinational circuits, called the higher voltage FF (HVFF). Although VDD scaling can reduce the energy, the minimu ..."
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energy by 13% compared with the conventional operation, which is 1/10 times smaller than the energy at the nominal supply voltage. Index Terms — Minimum operating voltage, subthreshold circuits, variations.

Energy Optimization of Subthreshold-Voltage Sensor Network Processors

by Leyla Nazh, Bo Zhai, Javin Olson, Anna Reeves, Michael Minuth, Ryan Helf, Sanjay Pant, Todd Austin, David Blaauw
"... Sensor network processors and their applications are a growing area of focus in computer system research and design. Inherent to this design space is a reduced processing performance requirement and extremely high energy constraints, such that sensor network processors must execute low-performance t ..."
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-performance tasks for long durations on small energy supplies. In this paper, we demonstrate that subthreshold-voltage circuit design (400 mV and below) lends itself well to the performance and energy demands of sensor network processors. Moreover, we show that the landscape for microarchitectural energy

Optimal Supply and Threshold Scaling for Subthreshold CMOS Circuits

by Alice Wang And, Alice Wang, Anantha P. Ch - IEEE Symposium on VLSI , 2002
"... With technology scaling, power supply and threshold voltage continue to decrease to satisfy high performance and low power requirements. In the past, subthreshold CMOS circuits have been inadequate for high performance applications, but have been used in applications that require ultra low power dis ..."
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With technology scaling, power supply and threshold voltage continue to decrease to satisfy high performance and low power requirements. In the past, subthreshold CMOS circuits have been inadequate for high performance applications, but have been used in applications that require ultra low power

Ultra Low Energy CMOS Logic Using Below-Threshold Dual-Voltage Supply

by Low Power Electronics, Kyungseok Kim, Vishwani D. Agrawal , 2011
"... This paper investigates subthreshold voltage operation of digital circuits. Starting from the previously known single supply voltage for minimum energy per cycle, we further lower the energy consumption by using dual subthreshold supplies. Level converters, commonly used in the above threshold desig ..."
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This paper investigates subthreshold voltage operation of digital circuits. Starting from the previously known single supply voltage for minimum energy per cycle, we further lower the energy consumption by using dual subthreshold supplies. Level converters, commonly used in the above threshold
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