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A Hierarchical Internet Object Cache

by Anawat Chankhunthod , Peter B. Danzig, Chuck Neerdaels, Michael F. Schwartz, Kurt J. Worrell - IN PROCEEDINGS OF THE 1996 USENIX TECHNICAL CONFERENCE , 1995
"... This paper discusses the design andperformance of a hierarchical proxy-cache designed to make Internet information systems scale better. The design was motivated by our earlier trace-driven simulation study of Internet traffic. We believe that the conventional wisdom, that the benefits of hierarch ..."
Abstract - Cited by 496 (6 self) - Add to MetaCart
This paper discusses the design andperformance of a hierarchical proxy-cache designed to make Internet information systems scale better. The design was motivated by our earlier trace-driven simulation study of Internet traffic. We believe that the conventional wisdom, that the benefits

Cache Design for Transcoding Proxy Caching

by Keqiu Li , Hong Shen , Keishi Tajima
"... Abstract. As audio and video applications have proliferated on the Internet, transcoding proxy caching is attracting an increasing amount of attention, especially in the environment of mobile appliances. Since cache replacement and consistency algorithms are two factors that play a central role in ..."
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in the functionality of transcoding proxy caching, it is of particular practical necessity to involve them into transcoding cache design. In this paper, we propose an original cache maintenance algorithm, which integrates both cache replacement and consistence algorithms. Our algorithm also explicitly reveals the new

Pipelined ECS Cache Design

by By Sam, Shannon V. Morton, Shannon V. Morton, Michael J. Liebelt, Michael J. Liebelt
"... This paper descibes the analysis and design of a pipelined cache as an example of how this pipelining might be achieved. The design of the instruction cache for the prototype microprocessor, ECSTAC-P, is a more specific problem and will be considered in another paper. 2 Framework ..."
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This paper descibes the analysis and design of a pipelined cache as an example of how this pipelining might be achieved. The design of the instruction cache for the prototype microprocessor, ECSTAC-P, is a more specific problem and will be considered in another paper. 2 Framework

Micropipelined Cache Design

by Strategies For An, Rahul Mehra
"... Declaration .............................................................................. 9 Acknowledgements .................................................................. 10 About the Author ..................................................................... 11 Chapter 1 ..."
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Declaration .............................................................................. 9 Acknowledgements .................................................................. 10 About the Author ..................................................................... 11 Chapter 1

Web Caching and Zipf-like Distributions: Evidence and Implications

by Lee Breslau, Pei Cao, Li Fan, Graham Phillips, Scott Shenker - IN INFOCOM , 1999
"... This paper addresses two unresolved issues about web caching. The first issue is whether web requests from a fixed user community are distributed according to Zipf's law [22]. Several early studies have supported this claim [9], [5], while other recent studies have suggested otherwise [16], [2] ..."
Abstract - Cited by 1091 (2 self) - Add to MetaCart
- ular, the question is whether these properties are inherent to web accesses or whether they are simply an artifact of the traces. An answer to these unresolved issues will facilitate both web cache resource planning and cache hierarchy design

Power Efficient Data Cache Designs

by Jaume Abella Antonio
"... This paper investigates some power efficient data cache designs that try to significantly reduce the cache energy consumption, both static and dynamic, with a minimal impact in performance. The basic idea is to combine different threshold voltages with different cache organizations that provide diff ..."
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This paper investigates some power efficient data cache designs that try to significantly reduce the cache energy consumption, both static and dynamic, with a minimal impact in performance. The basic idea is to combine different threshold voltages with different cache organizations that provide

Adaptive compressed caching: Design and implementation

by Rodrigo S. De Castro, Alair Pereira Do Lago, Dilma Da Silva - In SBAC-PAD ’03: Proceedings of the 15th Symposium on Computer Architecture and High Performance Computing , 2003
"... In this paper, we reevaluate the use of adaptive compressed caching in order to improve system performance through reduction of accesses to the backing stores. We propose a new and simple adaptability policy that adjusts the compressed cache size on-the-fly, and evaluate a compressed caching system ..."
Abstract - Cited by 12 (0 self) - Add to MetaCart
and benchmarks, each one with different memory pressures. The results showed performance improvements (up to 171.4%) in all of them if under memory pressure, and minimal overhead (up to 0.39%) when there is very light memory pressure. We believe this work shows that this adaptive compressed cache design should

Consistent hashing and random trees: Distributed caching protocols for relieving hot spots on the World Wide Web

by David Karger, Eric Lehman, Tom Leighton, Matthew Levine, Daniel Lewin, Rina Panigrahy - IN PROC. 29TH ACM SYMPOSIUM ON THEORY OF COMPUTING (STOC , 1997
"... We describe a family of caching protocols for distrib-uted networks that can be used to decrease or eliminate the occurrence of hot spots in the network. Our protocols are particularly designed for use with very large networks such as the Internet, where delays caused by hot spots can be severe, and ..."
Abstract - Cited by 699 (10 self) - Add to MetaCart
We describe a family of caching protocols for distrib-uted networks that can be used to decrease or eliminate the occurrence of hot spots in the network. Our protocols are particularly designed for use with very large networks such as the Internet, where delays caused by hot spots can be severe

Cache Design Trade-offs for Power and Performance Optimization:

by unknown authors
"... Caches consume a significant amount of energy in modern microprocessors. To design an energy-efficient microprocessor, it is important to optimize cache energy consumption. This paper examines performance and power trade-offs in cache designs and the effectiveness of energy reduction for several nov ..."
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Caches consume a significant amount of energy in modern microprocessors. To design an energy-efficient microprocessor, it is important to optimize cache energy consumption. This paper examines performance and power trade-offs in cache designs and the effectiveness of energy reduction for several

A Fully Associative SoftwareManaged Cache Design

by Erik G. Hallnor, Steven K. Reinhardt - In Proceedings of the 27th Annual International Symposium on Computer Architecture , 2000
"... As DRAM access latencies approach a thousand instruction-execution times and onchip caches grow to multiple megabytes, it is not clear that conventional cache structures continue to be appropriate. Two key features⎯full associativity and software management⎯have been used successfully in the virtual ..."
Abstract - Cited by 98 (2 self) - Add to MetaCart
caches without OS or application involvement. We see this structure as the first step toward OS- and application-aware management of large on-chip caches. This paper has two primary contributions: a practical design for a fully associative memory structure, the indirect index cache (IIC), and a novel
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