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Searching for authors named Serge Vernalde – sorted by Relevance.

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  • Timing Recovery By Symbol Spaced and Fractionally Spaced Equalizers  
  • by Martin Rosicky, Jan Maris, Serge Vernalde — 1997
  • …This paper presents a study of the digital timing recovery for high speed QAM receivers based on the symbol spaced and fractionally spaced equalizers (FSE). The aim of the investigation is to fix the intersymbol interference (ISI) caused by the clock phase error and frequency error between the trans…
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  • Design Space Exploration of All-Digital Symbol Timing Adjustment Architectures  
  • by Serge Vernalde, Patrick Schaumont, Marc Engels, Ivo Bolsens — 1996 — Proc. IEEE Fourth Symposium on Communications and Vehicular Technology in the Benelux
  • …In this contribution, a design space exploration of the various possible schemes for alldigital symbol timing adjustment of QAM signals is made. The exploration is guided by both performance degradation and implementation cost considerations. The BER performance degradation is obtained using a quasi…
  • Cited by 1 (1 self) – Add To MetaCart
  • Techniques to Evolve a C++ Based System Design Language  
  • by Robert Pasko, Serge Vernalde, Patrick Schaumont — 2002 — in Proceedings Design, Automation, and Test in Europe (DATE
  • …Complex systems-on-chip present one of the most challenging design problems of today. To meet this challenge, new design languages capable to model such heterogeneous, dynamic systems are needed. For implementation of such a language, the use of an object oriented C++ class library has proven to be …
  • Cited by 2 (0 self) – Add To MetaCart
  • Catthoor F., “Application of Task Concurrency Management on Dynamically Reconfigurable Hardware Platforms  
  • by Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor — in Proc. 2003 IEEE Symposium on Field-Programmable Custom Computing Machines, 2003, pp.278 – 279
  • …Dynamically Reconfigurable Hardware (DRHW) can take advantage of its reconfiguration capability to adapt at run-time its performance and its power consumption. However, due to the lack of programming support for dynamic task placement on these platforms, no previous work has been presented studying …
  • Cited by 1 (0 self) – Add To MetaCart
  • Hardware reuse at the behavioral level  
  • by Patrick Schaumont, Radim Cmar, Serge Vernalde, Marc Engels, Ivo Bolsens — 1999 — In Proceeding of the 36th Design Automation Conference
  • …Standard interfaces for hardware reuse are currently de ned at the structural level. In contrast to this, our contribution de nes the reuse interface at the behavioral registertransfer (RT) level. This promotes direct reuse of functionality and avoids the integration problems of structural reuse. We…
  • Cited by 9 (0 self) – Add To MetaCart
  • Dynamical Analysis Of All-Digital Symbol Timing Recovery In Twisted Pair Broadband Receivers  
  • by Jan Maris, Patrick Schaumont, Serge Vernalde, Marc Engels, Ivo Bolsens — 1997 — In Proc. 13 th Int. Conference on DSP
  • …: The use of all-digital symbol timing recovery is presented for a contemporary high speed modem application. This digital algorithm increases the integration and reduces the equalizer complexity. A dynamical analysis is presented, and the influence of important channel impairments is investigated. …
  • Cited by 1 (1 self) – Add To MetaCart
  • A programming environment for the design of complex high speed ASICs  
  • by Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens — 1998 — in Proceedings of the 35th Design Automation Conference
  • …A C++ based programming environment for the design of complex high speed ASICs is presented. The design of a 75 Kgate DECT transceiver is used as a driver example. Compact descriptions, combined with e cient simulation and synthesis strategies are essential for the design of such a complex system. I…
  • Cited by 24 (6 self) – Add To MetaCart
  • Interconnection Networks Enable Fine-Grain Dynamic Multi-Tasking On FPGAs  
  • by Theodore Marescaux, Andrei Bartic, Diderick Verkest, D. Verkest, Rudy Lauwereins, Serge Vernalde, R. Lauwereins — 2002
  • …Multimedia support appears on embedded platforms, such as WAP for mobile phones. However, true multimedia applications require both the computation power that only dedicated hardware can provide and the flexibility of software implementations. To this end, we are investigating reconfigurable archite…
  • Cited by 28 (7 self) – Add To MetaCart
  • Métodos de depuración HW-SW para sistemas on chip reconfigurables  
  • by Guillermo Talavera, Vincent Nollet, Jean-yves Mignolet, Diederick Verkest, Serge Vernalde, Rudy Lauwereins, Jordi Carrabina — 2004
  • …El dinamismo de las aplicaciones en sistemas on chip reconfigurables requiere un eficiente uso de los recursos disponibles. Para permitir la asignacin en tiempo real de los recursos, el sistema operativo y la plataforma SoC reconfigurable han de estar diseadas en paralelo. En este contexto, el de…
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