Searching for authors named Ramayya Kumar – sorted by Relevance.
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Formal Specification and Verification Techniques for RISC Pipeline Conflicts
- and Ramayya Kumar* Institut f��r Rechnerentwurf und Fehlertoleranz, Universit��t Karlsruhe, Germany
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Implementing a Methodology for Formally Verifying RISC Processors in HOL
- and Ramayya Kumar 2 1 University of Karlsruhe, Institute of Computer Design and Fault Tolerance (Prof. D
- Cited by 15 (7 self) – Add To MetaCart
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Implementational Issues for Verifying RISC-Pipeline Conflicts in HOL
- and Ramayya Kumar 2 1 University of Karlsruhe, Institute of Computer Design and Fault Tolerance (Prof. D
- Cited by 3 (1 self) – Add To MetaCart
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A Practical Methodology for the Formal Verification of RISC Processors
- @(email omitted); IRO Department, University of Montreal, Montr��al (Qu��bec), H3C 3J7 Canada RAMAYYA KUMAR kumar
- Cited by 9 (0 self) – Add To MetaCart
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Eliminating Higher-Order Quantifiers to Obtain Decision Procedures for Hardware Verification
- ? Klaus Schneider 1 , Ramayya Kumar 2 and Thomas Kropf 1 1 Universitat Karlsruhe, Institut fur
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Automating Verification by Functional Abstraction at the System Level
- , Ramayya Kumar 2 and Thomas Kropf 1 1 Universitat Karlsruhe, Institut fur Rechnerentwurf und
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Accelerating Tableaux Proofs using Compact Representations
- 1 Accelerating Tableaux Proofs using Compact Representations Klaus Schneider , Ramayya Kumar
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Why Hardware Verification needs more than Model Checking
- Why Hardware Verification needs more than Model Checking Klaus Schneider 1 , Ramayya Kumar 2
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Automating Most Parts of Hardware Proofs in HOL
- Automating Most Parts of Hardware Proofs in HOL Klaus Schneider, Ramayya Kumar and Thomas Kropf
- Cited by 3 (0 self) – Add To MetaCart
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Structuring Hardware Proofs: First steps towards Automation in Higher-Order Environment
- Schneider, Ramayya Kumar and Thomas Kropf University of Karlsruhe, Institute of Computer Design and Fault
- Cited by 4 (3 self) – Add To MetaCart

