exhibit poor ipc performance, typically requiring 100 µs for a short message transfer on a modern processor, running with 50 MHz clock rate. In contrast, we achieve 5 µs; a twentyfold improvement. This paper describes the methods and principles used, starting from the architectural design and going down

exhibit poor ipc performance, typically requiring 100,US for a short message transfer on a modern processor, running with 50 MHz clock rate. In contrast, we achieve 5,US; a twentyfold improvement. This paper describes the methods and principles used, starting from the architectural design and going down

Lightweight Remote Procedure Call (LRPC) is a communication facility designed and optimized for communication between protection domains on the same machine. In contemporary small-kernel operating systems, existing RPC systems incur an unnecessarily high cost when used for the type of communication

In the past decade, processor speed has become significantly faster than memory speed. Small, fast cache memories are designed to overcome this discrepancy, but they are only effective when programs exhibit data locality. In this paper, we present compiler optimizations to improve data locality

, the low performance delivered has been the main barrier to an extended use of this design in operating systems. µ-kernels heavily rely on sending IPC messages between processes, some of which implement memory management, device drivers and other abstractions such as filesystems or sockets. The high cost

to reduce the energy consumption of an adaptive video playing application by 46%. 1. Introduction Energy is a critical resource for mobile computers [5, 8]. In spite of many improvements in low-power hardware design and battery life, there is now growing awareness that a strategically viable approach

Keywords: distributed shared memory, speculation, Mojave. Interprocess communication (IPC) is ubiquitous in today’s computing world. One of the simplest mechanisms for IPC is shared memory. We present a system that enhances the System V IPC API to support distributed shared memory by using

This paper describes the design and implementation of virtual memory management within the CMU Mach Operating System and the experiences gained by the Mach kernel group in porting that system to a variety of architectures. As of this writing, Maeh runs on more than half a dozen uniprocessors

This paper presents a comprehensive design overview of the SunOS 5.4 kernel memory allocator. This allocator is based on a set of object-caching primitives that reduce the cost of allocating complex objects by retaining their state between uses. These same primitives prove equally effective

this paper, we propose an IPC mechanism that restores synchronous IPC semantics over transparent monitors. The key feature of this mechanism is that system monitors are considered as an extension of the kernel, so the source and destination are treated as if the kernel is still processing the IPC