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Table 3: Speed-up attained through both methods of synthesis. computationally-intensive tasks by augmenting the functionality of the core-processor with newly synthe- sized operations that match the computational char- acteristics of the application. The new operations are automatically synthesized on a recon gurable hard- ware platform, thus allowing the reuse of the same platform for di erent applications. Two methods for synthesizing the hardware were presented, VHDL De- signer and X-BLOX. The results showed that the structures generated by X-BLOX gave better speed and area performance on larger programs. For smaller programs both methods gave similar results.

in unknown title
by unknown authors
"... In PAGE 7: ... The execution times for programs run on the Am29050 without synthesis were derived from simulation using sim29[16]. The total speed-up attained by the PRISM-II sys- tem was calculated as Speed ? up = Execution time without synthesis Tload + Tprop + Tunload and is shown in Table3 . This table shows performance improvements greater than an order of magnitude on most programs.... ..."

Table 1. Speed and Area Comparison of Different Design Approaches

in Efficient Reconfigurable Logic Circuits for Matching Complex Network Intrusion Detection Patterns
by Christopher R. Clark, David E. Schimmel 2003
"... In PAGE 3: ... The designs were verified to produce correct output on a Xilinx Virtex-1000, a one-million-gate FPGA. The speed and area results are presented in Table1 . The distinguishing property between the designs is their character capacity.... ..."
Cited by 26

Table 3: Energy, speed, and area of gated-Vdd techniques for one cell.

in Gated-V dd : A Circuit Technique to Reduce Leakage in Deep-Submicron Cache Memories
by Michael Powell, Se-Hyun Yang, Babak Falsafi, Kaushik Roy, T. N. Vijaykumar 2000
"... In PAGE 5: ...1.4 Gated-Vdd Techniques Combined Table3 depicts four circuit-level gated-Vdd techniques we evalu- ate. The table depicts the percentage of leakage energy saved in the standby mode, the cell read times, and the area overhead of each technique relative to a standard low-Vt SRAM cell with no gated- Vdd.... In PAGE 5: ... While a DRI i-cache reduces the average required cache size, it incurs overhead due to resizing and may affect execution time. Figure 4 shows relative energy-delay products comparing the leak- age energy-delay of a DRI i-cache using the wide NMOS gated- Vdd, dual-Vt technique of Table3 to that of a conventional i-cache. We use the analytical models developed by Kamble and Ghose [6] to estimate the extra L1 and L2 dynamic energy dissipation [11].... ..."
Cited by 107

Table 3: Energy, speed, and area of gated-Vdd techniques for one cell.

in Gated-Vdd: A circuit technique to reduce leakage in deep-submicron cache memories
by Michael Powell, Se-hyun Yang, Babak Falsafi, Kaushik Roy, T. N. Vijaykumar 2000
"... In PAGE 5: ...1.4 Gated-Vdd Techniques Combined Table3 depicts four circuit-level gated-Vdd techniques we evalu- ate. The table depicts the percentage of leakage energy saved in the standby mode, the cell read times, and the area overhead of each technique relative to a standard low-Vt SRAM cell with no gated- Vdd.... In PAGE 5: ... While a DRI i-cache reduces the average required cache size, it incurs overhead due to resizing and may affect execution time. Figure 4 shows relative energy-delay products comparing the leak- age energy-delay of a DRI i-cache using the wide NMOS gated- Vdd, dual-Vt technique of Table3 to that of a conventional i-cache. We use the analytical models developed by Kamble and Ghose [6] to estimate the extra L1 and L2 dynamic energy dissipation [11].... ..."
Cited by 107

Table 3: Energy, speed, and area of gated-Vdd techniques for one cell.

in Gated-Vdd: A circuit technique to reduce leakage in deep-submicron cache memories
by Michael Powell, Se-hyun Yang, Babak Falsafi, Kaushik Roy, T. N. Vijaykumar 2000
"... In PAGE 5: ...1.4 Gated-Vdd Techniques Combined Table3 depicts four circuit-level gated-Vdd techniques we evalu- ate. The table depicts the percentage of leakage energy saved in the standby mode, the cell read times, and the area overhead of each technique relative to a standard low-Vt SRAM cell with no gated- Vdd.... In PAGE 5: ... While a DRI i-cache reduces the average required cache size, it incurs overhead due to resizing and may affect execution time. Figure 4 shows relative energy-delay products comparing the leak- age energy-delay of a DRI i-cache using the wide NMOS gated- Vdd, dual-Vt technique of Table3 to that of a conventional i-cache. We use the analytical models developed by Kamble and Ghose [6] to estimate the extra L1 and L2 dynamic energy dissipation [11].... ..."
Cited by 107

Table 1. Calculations for Speed and Area.

in High-Speed CMOS Switch Designs for Free-Space Optoelectronic MINs
by Osman Kibar, Philippe J. Marchand, Osman Kibar, Osman Kibar, Osman Kibar, Sadik C. Esener, Sadik C. Esener, Sadik C. Esener 1995
"... In PAGE 34: ...9. Table and Figure Captions: Table1 : Calculations for Speed and Area. Table 2: Calculations for Power Consumption and Density (excluding the transmitters/receivers and assuming f = 100 Mb/s).... ..."
Cited by 5

Table 1.2: Data rate requirements for short range wireless applications. Application Data Rate [Mb/s] High-definition video stream 19.2 Dolby Digital 5.1 or 10.2 channel audio 13.8 or 27.6 PC monitor or projector 63 to 1000 Video camera with MPEG2 resolution 75 to 150

in Communication
by David D. Wentzloff, Anantha P. Chandrakasan, Arthur C. Smith, David D. Wentzloff 2007

Table 4. Audio Coding Standards and Applications

in Perceptual Coding of Digital Audio
by Ted Painter, Andreas Spanias 2000
"... In PAGE 53: ... CONCLUSION A. SUMMARY OF APPLICATIONS FOR COMMERCIAL AND INTERNATIONAL STANDARDS Current applications ( Table4 ) for embedded audio coding include digital broadcast audio (DBA) [329, 330], Direct Broadcast Satellite (DBS) [331], Digital Versatile Disk (DVD) [332], high-definition television (HDTV) [333], cinematic theater [334], and audio-on-demand over wide area networks such as the Internet [335]. Audio coding has also enabled miniaturization of digital audio storage media such as Compact MiniDisk [336] and Digital Compact Cassette (DCC) [337, 338].... In PAGE 53: ... B. SUMMARY OF RECENT RESEARCH AND FUTURE RESEARCH DIRECTIONS The level of sophistication and high performance achieved by the standards listed in Table4 reflects the fact that audio coding algorithms have matured rapidly in less than a decade. The emphasis nowadays has shifted to realizations of low- rate, low-complexity, and low-delay algorithms [339].... ..."
Cited by 47

Table 3. HDTV Data Set Parameters

in Cache Performance for Multimedia Applications
by Nathan T. Slingerland, Alan Jay Smith 2001
"... In PAGE 2: ... Three MPEG-2 data sets are included to cover Dig- ital Video Disc (DVD) and High Definition Television or HDTV (720P, 1080I) resolutions. The parameters of the DVD, and HDTV data sets are listed in Table3 . quot;Frames quot; is the number of frames in the data set.... ..."
Cited by 19

Table 3. HDTV Data Set Parameters

in Cache Performance for Multimedia Applications
by Nathan T. Slingerland, Alan Jay Smith 2001
"... In PAGE 2: ... Three MPEG-2 data sets are included to cover Dig- ital Video Disc (DVD) and High Definition Television or HDTV (720P, 1080I) resolutions. The parameters of the DVD, and HDTV data sets are listed in Table3 . quot;Frames quot; is the number of frames in the data set.... ..."
Cited by 19
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