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Device and circuit techniques for reducing variation in nanoscale SRAM

by Andrew Evert Carlson, Andrew Evert, Carlson Abstract, Andrew Evert Carlson , 2008
"... by ..."
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c © 2014 Yuelin Du OPTIMIZATION FOR ADVANCED LITHOGRAPHY BY

by Yuelin Du
"... Lithography has always been the most critical process in integrated circuit (IC) fabrication. Below the 28 nm technology node, conventional 193 nm im-mersion lithography (193i) with single exposure has reached its printability limit. In order to keep up with Moore’s law, a lot of advanced lithograph ..."
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lithography and process techniques have been coming up in the recent decade, such as fin based multiple-gate field-effect (FinFET) transistors, electron beam lithog-raphy (EBL), self-aligned double patterning (SADP) lithography, directed self-assembly (DSA), extreme ultraviolet lithography (EUVL), etc. Each

Design and Analysis of Fast Low Power SRAMs

by Bharadwaj S. Amrutur, Bruce A. Wooley , 1999
"... This thesis explores the design and analysis of Static Random Access Memories (SRAMs), focusing on optimizing delay and power. The SRAM access path is split into two portions: from address input to word line rise (the row decoder) and from word line rise to data output (the read data path). Techniqu ..."
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This thesis explores the design and analysis of Static Random Access Memories (SRAMs), focusing on optimizing delay and power. The SRAM access path is split into two portions: from address input to word line rise (the row decoder) and from word line rise to data output (the read data path

A year in the life of immersion lithography at Albany

by Metrology Inspection, For Pattern Control, M. D. Tittnich, Albany Nanotech
"... 193nm immersion lithography has become a primary contender for the technology of choice for next generation lithography, with many technologists predicting it will be capable of taking the semiconductor industry to the 45nm, or even the 32nm manufacturing nodes. 2005 saw considerable breakthroughs, ..."
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193nm immersion lithography has become a primary contender for the technology of choice for next generation lithography, with many technologists predicting it will be capable of taking the semiconductor industry to the 45nm, or even the 32nm manufacturing nodes. 2005 saw considerable breakthroughs

Design and Analysis of SRAM’s for Energy Harvesting Systems

by Abdullah Omar, Mohammad Baz, Merz Court , 2014
"... At present, the battery is employed as a power source for wide varieties of microelectronic systems ranging from biomedical implants and sensor net-works to portable devices. However, the battery has several limitations and incurs many challenges for the majority of these systems. For instance, the ..."
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At present, the battery is employed as a power source for wide varieties of microelectronic systems ranging from biomedical implants and sensor net-works to portable devices. However, the battery has several limitations and incurs many challenges for the majority of these systems. For instance

Maskless Lithography Systems

by Hsin-i Liu, Hsin-i Liu, Block Gc, Block Gc
"... Copyright c ⃝ 2010 by Hsin-I Liu1 Architecture and Hardware Design of Lossless Compression Algorithms for Direct-Write ..."
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Copyright c ⃝ 2010 by Hsin-I Liu1 Architecture and Hardware Design of Lossless Compression Algorithms for Direct-Write

process variability in ultra-deep-submicron SRAMs

by Docteur De, L’université De Grenoble, Présentée Par, Co-encadrée Par Lorenzo Ciampolini, M. Gérard Ghibaudo, Karl Pearson , 2015
"... methodologies for modelling the impact of ..."
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methodologies for modelling the impact of

Assessing Chip-Level Impact of Double Patterning Lithography

by Kwangok Jeong, Andrew B. Kahng, Rasit O. Topaloglu
"... Abstract—Double patterning lithography (DPL) provides an attractive alternative or a supplementary method to enable the 32nm and 22nm process nodes, relative to costlier technology options such as high refractive index materials, extreme ultraviolet (EUV), or e-beam lithography. DPL implements patte ..."
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Abstract—Double patterning lithography (DPL) provides an attractive alternative or a supplementary method to enable the 32nm and 22nm process nodes, relative to costlier technology options such as high refractive index materials, extreme ultraviolet (EUV), or e-beam lithography. DPL implements

Metrology Supporting Extreme Ultraviolet Lithography........................

by Carlos M. Gutierrez, Robert Cresanti, Under Secretary, Commerce Technology, William Jeffrey Director , 2007
"... On the cover (top to bottom): Joseph Hodges operating frequency-stabilized cavity ring-down spectroscopy (CRDS) for measuring very low concentration contaminants in process gases. Time-resolved vertical distribution of optical emission at 750 nm from a dual-frequency capacitively-coupled plasma. Cri ..."
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On the cover (top to bottom): Joseph Hodges operating frequency-stabilized cavity ring-down spectroscopy (CRDS) for measuring very low concentration contaminants in process gases. Time-resolved vertical distribution of optical emission at 750 nm from a dual-frequency capacitively-coupled plasma

Large-Scale Variability Characterization and Robust Design Techniques for Nanoscale SRAM

by Zheng Guo , 2009
"... ..."
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