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Searching for authors named "Zhuo Li" – sorted by Relevance.

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13 documents found, showing 1 through 10. Next 10 →

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An O(bn 2 ) time algorithm for optimal buffer insertion with b buffer types
by Zhuo Li — 2005 — In Conf. on Design, Automation and Test in Europe (DATE
…An O(bn 2 ) Time Algorithm for Optimal Buffer Insertion with b Buffer Types ∗ Zhuo Li Dept…
Cited by 2 (1 self) – Add To MetaCart

Complexity analysis and speedup techniques for optimal buffer insertion with minimum cost
by Weiping Shi, Zhuo Li, Charles J. Alpert — 2004 — in ASP-DAC
… ∗ Weiping Shi Zhuo Li Charles J. Alpert Dept. of Electrical Engineering Dept. of Electrical Engineering IBM…
Cited by 6 (3 self) – Add To MetaCart

Process Variation Dimension Reduction Based on SVD
by Zhuo Li Xiang, Xiang Lu, Weiping Shi — 2003 — In IEEE ISCAS
… is supported by SPICE Zhuo Li, Xiang Lu and Weiping Shi Department of Electrical Engineering Texas A…
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Longest path selection for delay test under process variation
by Xiang Lu, Zhuo Li, Wangqi Qiu, D. M. H. Walker, Weiping Shi — 2004 — Proc. Asia South Pacific Design Automation Conf
… Path Selection for Delay Test under Process Variation Xiang Lu, Zhuo Li, Wangqi Qiu, D. M. H. Walker…
Cited by 5 (3 self) – Add To MetaCart

CodSim: A combined delay fault simulator
by Wangqi Qiu, Xiang Lu, Zhuo Li, D. M. H. Walker, Weiping Shi — 2003 — IEEE Int’l Symp. on Defect and Fault Tolerance in VLSI Systems
…CodSim – A Combined Delay Fault Simulator Wangqi Qiu * , Xiang Lu + , Zhuo Li + , D. M. H. Walker…
Cited by 5 (2 self) – Add To MetaCart

Making fast buffer insertion even faster via approximation techniques
by Zhuo Li, C. N. Sze, Charles J. Alpert, Jiang Hu, Weiping Shi — 2005 — in Proceedings of the ACM/IEEE Asia and South Pacific Design Automation Conference, 2005
…Making Fast Buffer Insertion Even Faster Via Approximation Techniques ∗ Zhuo Li 1 ,C.N.Sze 1…
Cited by 4 (3 self) – Add To MetaCart

A circuit level fault model for resistive shorts of MOS gate oxide. In: 5th international workshop on microprocessor test and verification
by Xiang Lu, Zhuo Li, Wangqi Qiu, D. M. H. Walker, Weiping Shi — 2004
…A Circuit Level Fault Model for Resistive Shorts of MOS Gate Oxide Xiang Lu † , Zhuo Li † , Wangqi…
Cited by 1 (0 self) – Add To MetaCart

PARADE: parametric delay evaluation under process variation [IC modeling
by Xiang Lu, Zhuo Li, Wangqi Qiu, D. M. H. Walker, Weiping Shi — 2004 — in 5th International Symposium on Quality Electronic Design, 2004
…PARADE: PARAmetric Delay Evaluation Under Process Variation * Xiang Lu † , Zhuo Li † , Wangqi Qiu…
Cited by 1 (0 self) – Add To MetaCart

At-Speed Test for Path Delay Faults Using Practical Techniques
by Wangqi Qiu, Jing Wang, Xiang Lu, Zhuo Li, D. M. H. Walker, Weiping Shi — 2004 — in Proc. IEEE International Workshop on Current and Defect Based Testing
… Lu + , Zhuo Li + , D. M. H. Walker * , Weiping Shi + * Dept. of Computer Science Texas A&M University…
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A Circuit Level Fault Model for Resistive Opens and Bridges
by Zhuo Li Xiang, Xiang Lu, Wangqi Qiu, Weiping Shi, D. M. H. Walker — 2003 — IEEE VLSI Test Symp., Napa Valley, CA, April-May
…A Circuit Level Fault Model for Resistive Opens and Bridges Zhuo Li + , Xiang Lu + , Wangqi Qiu…
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