Searching for authors named "Zhiping Yu" – sorted by Relevance.
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A TFT-LCD Simulation Method Using Pixel Macro Models
- Macro Models Hitoshi AOKI +a) , Member and Zhiping YU ++ ,No er SUMMARY The ful ll]U crystal displ y
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Direct Tunneling Current Model for Circuit Simulation
- , Zhiping Yu, and Robert W. Dutton Center for Integrated Systems, Stanford University Stanford, CA 94305
- Cited by 3 (0 self) – Add To MetaCart
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Impact of Gate Direct Tunneling Current on Circuit Performance: A Simulation Study
- -Young Nam, Student Member, IEEE, Zhiping Yu, Senior Member, IEEE, and Robert W. Dutton, Fellow, IEEE
- Cited by 4 (0 self) – Add To MetaCart
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Large Signal Agnal of RF Circuits in Device Simulation
- Semicondu rIndu Large Signal Agnal of RF Circuits in Device Simulation Zhiping YU +a) ,R#v ert W. DUTTON
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Accurate C-V Characterization Of Quarter-Micron Mos Devices Using Quantum Mechanical Corrections And Ac Simulation
- AND AC SIMULATION Zhiping Yu, Peter B. Griffin, and Robert W. Dutton Center for Integrated Systems
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Efficient Multi-Dimensional Simulation of Quantum Confinement Effects in Advanced MOS Devices
- Confinement Effects in Advanced MOS Devices Bryan A. Biegel Mario G. Ancona Conor S. Rafferty Zhiping Yu
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Characterization of Ultrathin Gate Oxide Thickness (1.3-1.8 nm)
- Gate Oxide Thickness (1.3–1.8 nm) Chang-Hoon Choi, Jung-Suk Goo, Tae-Young Oh, Zhiping Yu, Robert W
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Guidelines for the Power Constrained Design of a CMOS Tuned LNA
- Jung-Suk Goo, Kwang-Hoon Oh, Chang-Hoon Choi, Zhiping Yu, Thomas H. Lee, and Robert W. Dutton Center
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The Equivalence of van der Ziel and BSIM4 Models in Modeling the Induced Gate Noise of MOSFETs
- Jung-Suk Goo, William Liu † , Chang-Hoon Choi, Keith R. Green † , Zhiping Yu, Thomas H. Lee, and Robert
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Process and Layout Dependent Substrate Resistance Modeling for Deep Sub-Micron ESD Protection Devices
- Devices Xin Y. Zhang, Kaustav Banerjee, Ajith Amerasekera * , Vikas Gupta * , Zhiping Yu, and Robert W
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