Searching for authors named "Xianlong Hong" – sorted by Relevance.
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A new multi-layer global routing flow for congestion elimination *
- A new multi-layer global routing flow for congestion elimination * Jinghong Liang, Xianlong Hong
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G-Tree: gravitation-direction-based rectilinear Steiner minimal tree construction considering bend reduction *
- reduction * Jinghong Liang, Xianlong Hong, Tong Jing Computer Science and Technology Department, Tsinghua
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An efficient timing-driven global routing algorithm
- Circuit Design * Jingyu Xu, Xianlong Hong, Tong Jing, Yici Cai Jun Gu Dept. of Computer Science
- Cited by 20 (4 self) – Add To MetaCart
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A Coupling and Crosstalk Considered Timing-Driven Global Routing Algorithm for High Performance Circuit Design
- Circuit Design Jingyu Xu, Xianlong Hong, Tong Jing, Ling Zhang Dept. of Computer Science & Technology
- Cited by 1 (1 self) – Add To MetaCart
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An-Oarsman: Obstacle-Avoiding routing tree construction with good length performance
- Jing, Xianlong Hong, Zhe Feng Computer Science & Technology Department Tsinghua University Beijing
- Cited by 5 (0 self) – Add To MetaCart
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Efficient octilinear steiner tree construction based on spanning graphs
- , Tong Jing 1 , Xianlong Hong 1 , Yang Yang 1 1 Dept. of CST, Tsinghua Univ., Beijing 100084, P. R. China
- Cited by 8 (4 self) – Add To MetaCart
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An efficient hierarchical timing-driven Steiner tree algorithm for global routing
- , Xianlong Hong, Tong Jing, Yici Cai Dept. of Computer Science & Technology, Tsinghua University, Beijing, P
- Cited by 6 (5 self) – Add To MetaCart
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CDCTree: Novel obstacle-avoiding routing tree construction based on current driven circuit model
- Yiyu Shi 1 , Tong Jing 2 , Lei He 1 , Zhe Feng 2 and Xianlong Hong 2 Electrical Engineering Department
- Cited by 3 (0 self) – Add To MetaCart
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Y.: A routing paradigm with novel resources estimation and routability models for X-architecture based physical design
- Physical Design ⋆ Yu Hu 1 , Tong Jing 1 , Xianlong Hong 1 , Xiaodong Hu 2 , and Guiying Yan 2 1 Computer
- Cited by 2 (1 self) – Add To MetaCart
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12.1 Partitioning-Based Approach to Fast On-Chip Decap Budgeting and Minimization ∗
- † , Zhenyu Qi † , Sheldon X.-D. Tan † , Lifeng Wu ‡ ,YiciCai § and Xianlong Hong § † Department of Electrical
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