Searching for authors named "Vivek De" – sorted by Relevance.

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19 documents found, showing 1 through 10. Next 10 →

Design and reliability challenges in nanometer technologies
by Shekhar Borkar, Tanay Karnik, Vivek De — 2004 — Proceedings of Design Automation Conference (DAC
…Design and Reliability Challenges in Nanometer Technologies Shekhar Borkar, Tanay Karnik, Vivek De…
Cited by 21 (0 self) – Add To MetaCart

Design and Optimization of Low Voltage High Performance Dual Threshold CMOS Circuits
by Liqiong Wei, Zhanping Chen, Mark Johnson, Kaushik Roy, Vivek De — 1998 — In Proceedings of the 35th Design Automation Conference
… Purdue University, W. Lafayette, IN 47907-1285 Vivek De Microcomputer Research Labs, Intel Corp…
Cited by 26 (3 self) – Add To MetaCart

Life Is CMOS: Why Chase the Life After?
by George Sery Shekhar, Shekhar Borkar, Vivek De — 2002
…Life Is CMOS: Why Chase the Life After? George Sery, Shekhar Borkar, Vivek De Intel Corporation RN…
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Parameter variations and impact on circuits and microarchitecture
by Shekhar Borkar, Tanay Karnik, Siva Narendra, Jim Tschanz, Ali Keshavarzi, Vivek De — 2003
… Karnik, Siva Narendra, Jim Tschanz, Ali Keshavarzi, Vivek De Circuit Research, Intel Labs, JF3-334, 2111…
Cited by 61 (1 self) – Add To MetaCart

Technology Scaling Behavior of Optimum Reverse Body Bias for Standby Leakage Power Reduction
by Ali Keshavarzi, Siva Narendra, Shekhar Borkar, Charles Hawkind, Kaushik Roy, Vivek De — 1999 — Power Reduction on CMOS ICs,” in Proceedings of the International Symposium on Low Power Electronics and Design, ISLPED
… in CMOS IC's Ali Keshavarzi, Siva Narendra, Shekhar Borkar, Charles Hawkind, Kaushik Roy* and Vivek De…
Cited by 9 (0 self) – Add To MetaCart

General Co-Chairs:
by Call For Participation, Vivek De, Mary Jane Irwin — 2002
… and synthesis tools, to system level design and optimization. General Co-Chairs: Vivek De Mary Jane Irwin Intel…
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Total Power Optimization by Simultaneous Dual-Vt Allocation and Device Sizing in High Performance Microprocessors
by Tanay Karnik, Yibin Ye, James Tschanz, Liqiong Wei, Steven Burns, Venkatesh Govindarajulu, Vivek De, Shekhar Borkar — 2002
…, Vivek De, Shekhar Borkar Circuit Research, Intel Labs, 5200 NE Elam Young Parkway, Hillsboro, OR 97124…
Cited by 15 (1 self) – Add To MetaCart

Total poweroptimal pipelining and parallel processing under process variations in nanometer technology
by Nam Sung Kim, Taeho Kgil, Keith Bowman, Vivek De, Trevor Mudge — 2005 — In International Conference on ComputerAided Design
… Technology Nam Sung Kim 1 , Taeho Kgil 2 , Keith Bowman 1 , Vivek De 1 , and Trevor Mudge 2 1 Intel…
Cited by 4 (0 self) – Add To MetaCart

Cascode buffer for monolithic voltage conversion operating at high input supply voltages
by Volkan Kursun, Gerhard Schrom, Vivek K. De, Eby G. Friedman, Siva G. Narendra — 2005 — In Proceedings of the IEEE International Symposium on Circuits and Systems
… Kursun, Gerhard Schrom 1 , Vivek K. De 1 , Eby G. Friedman 2 , and Siva G. Narendra 1 1 Circuit Research…
Cited by 1 (1 self) – Add To MetaCart

Dynamic Noise Analysis in Precharge-Evaluate Circuits
by Dinesh Somasekhar, Seung Hoon Choi, Kaushik Roy, Yibin Ye, Vivek De — 2000 — in Proc. Design Automation Conference
…-58113-188-7/00/0006..$5.00 Yibin Ye and Vivek De Intel Corp. Hillsboro, OR 97124-6461 (yibin.ye,vivek.de…
Cited by 2 (1 self) – Add To MetaCart

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