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Searching for authors named "Vijayaraghavan Soundararajan" – sorted by Relevance.

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3 documents found, showing 1 through 3.

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Dribble-Back Registers: A Technique For Latency Tolerance In Multiprocessors
by V. Soundararajan, Vijayaraghavan Soundararajan, Vijayaraghavan Soundararajan — 1992
…-BACK REGISTERS: A TECHNIQUE FOR LATENCY TOLERANCE IN MULTIPROCESSORS Vijayaraghavan Soundararajan October 1992…
Cited by 8 (0 self) – Add To MetaCart

Dribbling Registers: A Mechanism for Reducing Context Switch Latency in Large-Scale Multiprocessors
by Vijayaraghavan Soundararajan, Anant Agarwal — 1992
…-Scale Multiprocessors Vijayaraghavan Soundararajan and Anant Agarwal Laboratory for Computer Science Massachusetts…
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Flexible Use of Memory for Replication/Migration in Cache-Coherent DSM Multiprocessors
by Vijayaraghavan Soundararajan, Mark Heinrich, Ben Verghese, Kourosh Gharachorloo, Anoop Gupta, John Hennessy — 1998 — In Proceedings of the 25th Annual International Symposium on Computer Architecture
… Multiprocessors Vijayaraghavan Soundararajan 1 , Mark Heinrich 1 , Ben Verghese 2 , Kourosh Gharachorloo 2 , Anoop…
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