Searching for authors named "Valavan Manohararajah" – sorted by Relevance.
6 documents found, showing 1 through 6.
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Area Optimizations in FPGA Architecture and CAD
- …Area Optimizations in FPGA Architecture and CAD by Valavan Manohararajah A thesis submitted…
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Parallel alpha-beta search on shared memory multiprocessors
- …Parallel Alpha-Beta Search on Shared Memory Multiprocessors by Valavan Manohararajah A thesis…
- Cited by 1 (0 self) – Add To MetaCart
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Timing Driven Functional Decomposition for FPGAs
- …Timing Driven Functional Decomposition for FPGAs ABSTRACT Valavan Manohararajah, Deshanand P…
- Cited by 3 (3 self) – Add To MetaCart
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Mapping Arbitrary Logic Functions into Synchronous Embedded Memories For Area Reduction on FPGAs
- … Gordon R. Chiu, Deshanand P. Singh, Valavan Manohararajah, and Stephen D. Brown Toronto Technology Center…
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Heuristics for area minimization in LUT-based FPGA technology mapping
- …Heuristics for Area Minimization in LUT-Based FPGA Technology Mapping Valavan Manohararajah…
- Cited by 11 (2 self) – Add To MetaCart
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Difficulty of Predicting Interconnect Delay in a Timing Driven FPGA
- …Difficulty of Predicting Interconnect Delay in a Timing Driven FPGA CAD Flow Valavan Manohararajah…
- Cited by 1 (1 self) – Add To MetaCart
Showing 1 through 6.
