Searching for authors named "Uri Weiser" – sorted by Relevance.
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MMX™ Technology Architecture Overview
- Peleg, IDC Architecture Group, Israel, Intel Corp. Uri Weiser, IDC Architecture Group, Israel, Intel
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Nahalal: Cache Organization for Chip Multiprocessors
- 2 , Uri C. Weiser 2 Electrical Engineering Department, Technion, Haifa, Israel 1 zguz
- Cited by 1 (1 self) – Add To MetaCart
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Utilizing Shared Data in Chip Multiprocessors with the Nahalal Architecture
- Keidar 2 , Avinoam Kolodny 2 , Uri C. Weiser 2 Department of Electrical Engineering Technion - Israel
- Cited by 1 (0 self) – Add To MetaCart
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Correlated Load-Address Predictors
- Kirshenboim, Lihu Rappoport, Adi Yoaz, and Uri Weiser Intel Corporation Intel Israel (74) Ltd., Haifa 31015
- Cited by 31 (1 self) – Add To MetaCart
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Performance, power efficiency and scalability of asymmetric cluster chip multiprocessors
- . Morad† Uri C. Weiser‡ Avinoam Kolodny† Mateo Valero* Eduard Ayguadé* †Department of Electrical
- Cited by 6 (1 self) – Add To MetaCart

