Searching for authors named "Sujan Pandey" – sorted by Relevance.
7 documents found, showing 1 through 7.
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Robust On-Chip Bus Architecture Synthesis for MPSoCs Under Random Tasks Arrival
- …Robust On-Chip Bus Architecture Synthesis for MPSoCs Under Random Tasks Arrival Sujan Pandey † NXP…
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Architecture Level Design Space Exploration and Mapping of Hardwares
- …Architecture Level Design Space Exploration and Mapping of Hardwares Sujan Pandey, Manfred Glesner…
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On-Chip Communication Topology Synthesis for Shared Multi-Bus Based Architecture
- …ON-CHIP COMMUNICATION TOPOLOGY SYNTHESIS FOR SHARED MULTI-BUS BASED ARCHITECTURE Sujan Pandey…
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Performance Aware On-Chip Communication Synthesis and Optimization for Shared Multi-Bus Based Architecture
- … Architecture ABSTRACT Sujan Pandey ∗ Institute of Microelectronics Systems Darmstadt University of Technology…
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Co-synthesis of custom on-chip bus and memory for mpsoc architectures
- …-synthesis of bus architecture and memory. Sujan Pandey Christian Genz Rolf Drechsler Department of Computer Science…
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High level Hardware/Software Communication Estimation in Shared Memory Architecture
- …High level Hardware/Software Communication Estimation in Shared Memory Architecture Sujan Pandey…
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An Infrastructure for Distributed Computing and Context Aware Computing
- …An Infrastructure for Distributed Computing and Context Aware Computing Sujan Pandey, Peter Zipf…
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Showing 1 through 7.
