Searching for authors named "Stamatis Vassiliadis" – sorted by Relevance.
160 documents found, showing 1 through 10.
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The Midlifekicker Microarchitecture Evaluation Metric
- …We introduce the midlifekicker metric for evaluating microarchitectures mostly during the design process. We assume a microarchitecture designed at a time T-1 and estimate if a new microarchitecture projected for time T has advantages over the microarchitecture designed at T-1 and remapped on the sa…
- Cited by 3 (1 self) – Add To MetaCart
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Redundant Addition with Threshold Logic
- …In this paper we investigate threshold based networks performing 2 \Gamma 1 addition using redundant binary operand representations. In particular we concern with establishing the networks with the smallest network depth assuming small weight and fan-in values. First we propose a depth-4 implementat…
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Arbitrating Instructions in a ρμ-coded CCM
- …In this paper, the design aspects of instruction arbitration in an #-coded CCM are discussed. Software considerations, architectural solutions, implementation issues and functional testing of an #-code arbiter are presented. A complete design of such an arbiter is proposed and its VHDL code is s…
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Reconfigurable Repetitive Padding Unit
- …This paper proposes a reconfigurable processing unit, which performs the MPEG-4 repetitive padding algorithm in real time. The padding unit has been implemented as a scalable systolic structure of processing elements. A generic array of PE has been described in VHDL, and the functionality of the uni…
- Cited by 2 (1 self) – Add To MetaCart
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Periodic Symmetric Functions, Serial Addition and Multiplication with Neural Networks
- …This paper investigates threshold based neural networks for periodic symmetric Boolean functions and some related operations. It is shown that any n-input variable periodic symmetric Boolean function can be implemented with a feed-forward linear threshold based neural network with size of O(log n) a…
- Cited by 8 (4 self) – Add To MetaCart
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DELFT-JAVA Link Translation Buffer
- …We describe the hardware support in the DELFT-JAVA processor which enables efficient dynamic linking of JAVA programs. The proposed mechanism supports method invocation of dynamically linked classes through the use of a Link Translation Buffer (LTB). Since our Instruction Set Architecture directly s…
- Cited by 3 (2 self) – Add To MetaCart
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Low Weight and Fan-In Neural Networks for Basic Arithmetic Operations
- …In this paper we investigate low weight and fan-in neural networks for the precise computation of some basic arithmetic operations. First we assume one bit per serial cycle LSB first operand reception and introduce a pipeline network performing serial binary addition in O(n) time constructed with 11…
- Cited by 7 (5 self) – Add To MetaCart
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7|2 Counters and Multiplication with Threshold Logic
- …In this paper we propose new, threshold logic based, 7|2 counters. In particular we show that 7|2 counters can be implemented with threshold logic gates in three levels of gates with explicit computation of the outputs. Consequently, we improve the delay by showing that 7|2 counters can be designed …
- Cited by 7 (6 self) – Add To MetaCart
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Matchmaking Among Minimal Agents Without a Facilitator
- …Multi-Agent Systems are a promising way of dealing with large complex problems. However, it is not yet clear just how much complexity or pre-existing structure individual agents must have to allow them to work together e#ectively. In this paper, we ask to what extent agents with minimal resources, l…
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Local Distributed Agent Matchmaking
- …This paper explores through simulation an abstract model of distributed matchmaking within multi-agent systems. We show that under certain conditions agents can find matches for cooperative tasks without the help of a predefined organization or central facilitator.…
- Cited by 6 (3 self) – Add To MetaCart
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